Dear ST Community and Experts,
I am facing a persistent SPI error (SPIE bit set) issue with the VN9D5D20FN high-side driver and would appreciate your help in troubleshooting.
1. Problem Description:
I am attempting to write to specific control registers via SPI, but the device frequently sets the SPI Error bit (SPIE), indicating a communication fault. The issue is particularly reproducible with certain registers and bit operations:
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When writing a '1' followed by a '0' to bit 2 of registers 0x01 and 0x02, the SPIE error occurs almost every time.
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Interestingly, similar write operations to registers 0x00 and 0x03do nottrigger this error.
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Write operations to register 0x13also occasionally cause the SPIE error.
2. My SPI Configuration:
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SPI Mode:0 (CPOL=0, CPHA=0).
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Clock Frequency:1 MHz.
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Data Order:MSB first.
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Data Frame:The communication is set for 24 clock pulses per transaction, as required by the VN9D5D20FN.
3. What I've Checked/Note:
According to the datasheet, the SPIE bit is set due to errors in SPI communication, such as an incorrect SCK count or an SDI (MOSI) stuck-at condition.
My logic analyzer traces confirm that the SCK pulse count is consistently 24 per transaction. The problem seems to be related to specific write sequences to the aforementioned registers rather than a complete communication failure.
Question:
Could you please provide guidance on what might be causing these SPIE errors specifically during writes to bits in registers 0x01, 0x02, and 0x13? Are there any known specific timing requirements, register access restrictions, or common configuration pitfalls for these particular registers that I should be aware of?
Thank you very much for your support!
