2025-04-10 5:13 AM - last edited on 2025-04-10 5:37 AM by Andrew Neil
V SWITCH_MIN (VLXx)is measured below the the absolute maximum rating on datasheet (-0.5V).
However this limit is momentary ony (7.2 ns) as shown on the measurement.
Usually datasheet specifies the minimum DC limit and minimum limit during transient value.
Minimum limit during transient is not mentioned in datasheet.
Could you assist in evaluating if the transient votlage of -1.40V on VLXx for ~7.2 ns is acceptable.
Current situation:
V SWITCH_MIN does not remain <-0.5V for longer than 10ns. (-1.4V for 4.2ns)
Evaluate if this situation is acceptable.
VLxx is -1.4V for about 7.2ns
Zoomed out view of switching node
Solved! Go to Solution.
2025-04-14 6:21 AM
Hi Deep,
Table 4 is from an old version of STPMIC1 DS, please check the device web page, it is a little bit lower than 7V.
Thank you for the additional waveform, I have few questions:
1) are you using the ST demo-board or you are using a customized board to fit your application?
2) in case of customized board, could you share the STPMIC1 PCB layout for a review?
3) if you don't want to share the PCB layout, please check the AN5431 at
The STPMIC1 PCB layout guidelines - Application note
4) you said "I used active probe TAP1500 from Tektronix with short loop GND spring pins", is it possible to have a picture? If not ok...
This overvoltage and undervoltage are allowed because those ratings are dc ratings and are not violated by voltage excursions caused by MOSFET (power bridge, Hi-Side and Low-Side) body diode due to dead time just to avoid cross-conduction.
These extra-voltages are normal and expected behavior for every synchronous buck converter.
With a good board layout and proper measurement technique, this behavior can be mitigate
Your waveforms are very clear with no big jitter @320mA in CCM, I don't have data about timing of the extra voltages but I can say your waveforms are comparable with what we have seen in our lab.
Let me know
Regards,
Vincenzo
2025-04-10 8:03 AM
Hello DeepAmpel,
the waveforms seems to be ok, but I would ask you what is the probe you use,
I mean, have you used a short ground as a reference close to the PGNDx (x the number of converter you check),
this to avoid signal induced trough the voltage probe itself. Below an example in red
Regards,
Vincenzo
2025-04-11 12:15 AM - last edited on 2025-04-11 12:16 AM by Andrew Neil
Hi Vincenzo,
Thanks for a quick response.
I used active probe TAP1500 from Tektronix with short loop GND spring pins.
Some detailed image of the measurement (I included above as a reference only). Below is the detailed picture with persistence.
+1V25_VDDCPU Vsw @ VIN_TYP. 190mA (Seems to be in discontinuous mode at current below ~300mA)
+1V25_VDDCPU Vsw @ VIN_TYP. 270mA (Seems to be in discountonuous mode at current below ~300mA)
+1V25_VDDCPU Vsw @ VIN_TYP. 320mA (Seems to be in continuous mode at current ~320mA)
But the main question is about the Lower voltage limit on the VLxx pin.
Since it was not stated on datasheet, is lower voltage at VLxx pin during short transient acceptable?
( transient votlage of -1.40V on VLXx for ~7.2 ns is acceptable? because datasheet says absolute limit of -0.5V only and does not say what lower limit is acceptable for short transients)
Regards
Deep
2025-04-14 6:21 AM
Hi Deep,
Table 4 is from an old version of STPMIC1 DS, please check the device web page, it is a little bit lower than 7V.
Thank you for the additional waveform, I have few questions:
1) are you using the ST demo-board or you are using a customized board to fit your application?
2) in case of customized board, could you share the STPMIC1 PCB layout for a review?
3) if you don't want to share the PCB layout, please check the AN5431 at
The STPMIC1 PCB layout guidelines - Application note
4) you said "I used active probe TAP1500 from Tektronix with short loop GND spring pins", is it possible to have a picture? If not ok...
This overvoltage and undervoltage are allowed because those ratings are dc ratings and are not violated by voltage excursions caused by MOSFET (power bridge, Hi-Side and Low-Side) body diode due to dead time just to avoid cross-conduction.
These extra-voltages are normal and expected behavior for every synchronous buck converter.
With a good board layout and proper measurement technique, this behavior can be mitigate
Your waveforms are very clear with no big jitter @320mA in CCM, I don't have data about timing of the extra voltages but I can say your waveforms are comparable with what we have seen in our lab.
Let me know
Regards,
Vincenzo