Hi,
I am designing a BMS exploiting the L9963E ic. The battery pack is a 144V one, made of several lipo cells in series. I'm going for a Distributed configuration, using a master board and 3 slave PCBs.
The question is:
The VBAT pin cannot support voltage higher than 72V, however on the inner and top most PCBs the voltage on the c14 is 88 and 133V respectively, with respect to the battery pack gnd.
I'm looking at EVAL-L9963E-NDS schematic that should represent a possible slave configuration; cells from 1 to 14 should in this case be the one in the middle of the pack with cell 1, connected to the last cell of the first slave PCB and cell 14 being the one to be connected to the upper slave PCB.
Now is the GND_EXT (as named of the EVAL-L9963E-NDS schematic) connected to the battery pack ground or is it connected on the C0 terminal? If the first case, wouldn't
this mean to fry the VBAT pin ?
I hope I was clear
Thanks in advance for your reply.
