BiSS-C Implementation

Bucky · ‎2022-05-30

Hi All,

we are evaluating the possibilty to use a BiSS-C encoder in our project. First time using BiSS-C.

From the BiSS-C standard it seems to me that BiSS-C can be implemented at STM32 level by mean of an SPI peripheral connected to an Rs422 transceiver.

Things that is bugging me is that BiSS-C frame seems to not be aligned to 8-bit boundary (e.g. to transfer 26-bits exactly 26 clock pulses have to be yielded) so SPI cannot be fit for this application.

Does anyone already implemented BiSS-C interface with STM32? How to?

Thanks in advance for your support,

Bucky

Andrew Neil · ‎2025-07-10

@aljaz wrote:
BiSS C encoders can happily accept more clock pulses than written in the documentation.

Is that guaranteed, or is that just a happy accident for your particular encoders?

@aljaz wrote:
Written by the (sic?) BiSS C encoder manufacturer.

there's only one?

A complex system that works is invariably found to have evolved from a simple system that worked.
A complex system designed from scratch never works and cannot be patched up to make it work.

aljaz · ‎2025-07-10

It is guaranteed.

I work in the company producing encoders and develop test equipment to read BiSS encoders. Tested dozens of different encoders. All were compatible.

Andrew Neil · ‎2025-07-10

@aljaz wrote:
It is guaranteed.

Good to know.

I wonder why it was not clear to @Bucky - have the specs been clarified since 2022?

@aljaz wrote:
I work in the (sic?) company producing encoders

you mean a company producing encoders ?

A complex system that works is invariably found to have evolved from a simple system that worked.
A complex system designed from scratch never works and cannot be patched up to make it work.

aljaz · ‎2025-07-10

Datasheets of encoders specify the exact data frame. With fixed number of clock cycles. However all encoders must work with less and with more clock cycles than specified, without data corruption or unexpected behavior. This is written deep in the BiSS specification. And encoder state is reset by the Timeout sequence. All of this has history in the SSI protocol, from which BiSS has emerged. Some less obvious things have a long legacy and you kind of need to have insider's view to see them clearly. An average encoder user just looks at the datasheet, most of the time without other background knowledge.