2004-06-01 07:26 AM
Watchdog timer errata for the uPSD32xx
2011-05-17 03:01 AM
The actual operation of the watchdog timer in uPSD32xx family of devices is different from what is documented in the current data sheets. The actual operation is as follows:
A) Writing a ''0'' to the WDRST register effectively disables the watchdog timer; however, the recommended way to disable the watchdog timer is to write 0x55 to the WDKEY register as stated in the data sheets. B) The watchdog timer essentially counts down from the value written into the WDRST register (when enabled) rather than up.