Posted on May 17, 2011 at 11:52According to the uPSD3434 data sheet is should be possible to enable the main flash banks to both code space and data space simultaneously. However attempting to do so appears to prevent the CPU from executing the code.
The device under test is a uPSD3434E40U6, revision A running at 20MHz.
I have the following memory map
FS0 0000-7FFF Code bank (boot & main application)
FS1-7 8000-FFFF Data, Pages 0-6, flash disk, initially empty
CS0-3 0000-7FFF Code bank (flash disk I/O)
RS 0000-1FFF
CSIOP 7F00-7FFF
USB 7000-703F
The application uses the FS data area as a USB flash disk. I also have PC4 & 7 configured as external I/O selects at 7E00-7E07, although these are not accessed by this application (and do work on other applications that use them). My code does its own bank switching, it does not use the system provided by RIDE.
If I restrict operation to so that only code in the CS bank can access data in the FS (VM = 0x12), and that code in the FS can only access data in SRAM (VM=0x04) the program works perfectly, I can read and write the flash disk through the USB port.
If I try to allow code in FS0 to read data in FS1 (VM=0x14, PAGE=0) the program appears lost. Nothing initialises, and the RIDE debugger indicates ''error exploring'' on the first instruction executed following the MOVX to VM, that changes it from 0x04 to 0x14. This is long before any read to high data occurs.
I would expect a side effect of this mode to be that the FS code page appears in the data range 2000-7F00, causing a conflict if I did any external I/O (which I don't), and I understand that I cannot write to FS in this mode, but I don't see why I lose the program.
Has anyone else successfully used a uPSD34xx with VM=0x14?
Tim Jackson
