2004-01-07 09:21 AM
2011-05-17 02:57 AM
hello,
We are trying to implement the hardware watchdog with uPSD3233B. According to my knowledge,flash link (JTAG)cable pin8 is connected to reset pin of uPSD. During ISP,whether the naual reset will affect the JTAG operation of programming or not?? hat i have observed is,during ISP using JTAG,all the port lines of uPSd are in input state (logic 1).,so in this state , hardware atchdog refreshing is no longer possible.If we conside the watchdog time out to be second, controller should get reset in between the programming. but it's not the case. i would like to know the reason behind the same. Regards, Purvi2011-05-17 02:57 AM
During JTAG ISP operation, the Reset on the JTAG IP is holding off the the Reset from the MCU side, therefore the MCU Watchdog function is not working during PSD (flash memory) access time.