Problem with bootloader and bank switch

[fabio239955_stm1_stmicro]

Posted on January 18, 2010 at 07:20

Problem with bootloader and bank switch

[pm9341]

Posted on May 17, 2011 at 09:47

@jmullens:

I try the bank remap with WDG softreset, same issue.

[mikhailm]

Posted on May 17, 2011 at 09:47

same problem - loader works fine, from booting from bank 1 and burning entire program to bank 0.

Context of bank 0 verified - it is what I need. Jump doesn't work. Any ideas from anybody?

[mark9]

Posted on May 17, 2011 at 09:47

I had trouble with Bank0 jumps to Bank1 (ie the main application requests to enter the Bootloader) ... It would work sometimes and then not othertimes. The issue comes from the fact that Bank1 goes haywire if you do not enable write protection after any writes to it. I am using Bank1 (0-3FFF) for DFU bootloader, and Bank1 (4000-7FFF) for parameter storage. I was writing to parameter storage in the main application.

In short, be sure to call FMI_WriteProtectionCmd(xxx, ENABLE); when you are done writing to bank1 flash. This is basically my code: static __ramfunc void BSP_JumpToBootloader(void) { // there are two ways of doing this. one is to enable the watchdog and then timeout. // The other is to jump to the BANK1 reset vector. // I'll try the later one... typedef void (*pFunction)(void); pFunction Jump_To_Application; FMI->BBSR = FMI_BOOT_BANK_Size; FMI->NBBSR = FMI_NON_BOOT_BANK_Size; FMI->BBADR = FMI_LOW_FLASH_BANK >> 2; FMI->NBBADR = FMI_HIGH_FLASH_BANK >> 2 ; Jump_To_Application = (pFunction) FMI_LOW_FLASH_BANK ; // should be zero #pragma diag_suppress=Ta022 // we are jumping from RAM to ROM, and the compiler is issuing a warning. We can ignore it. Jump_To_Application(); } void BSP_Reset(void) { __disable_interrupt(); SCU_PFQBCCmd(DISABLE); while(FMI->SR & 0x10) ; // wait till PFQBC is disabled SCU_AHBPeriphReset(__VIC, ENABLE); // disable VIC, hold in reset. BSP_JumpToBootloader(); }

[pyv]

Posted on May 17, 2011 at 09:47

Hello,

I have the same problem: I'm booting in bank1, I'm donwloading and writing my new software in Bank0 and after that I remap the address of boot bank (in my case the bank1) and the STR9 (STR912FAW44) stops working... Did you find a solution Jmullens or others ? I'm using Keil compiler (uVision3)( I'm a bit disappointed because nobody talk about this issue on Keil forum ) My bootloader sofware is based on the ST IAP UART application note. And the UserApplication sofware is also based on it. So much people have problem to make a bootloader sinds the beginning of STR9 (2006!), I don't understand why nobody (ST, Keil, ARM ?,...) give a full explaination of how it is working ! Because everybody has problems with bootloading from bank 1. In advance, thank you ;)

[alexanderpapsdorf9]

Posted on May 17, 2011 at 09:47

Hello,

I had also a problem with the bank switching and the Keil µVision 3.0 (drove me almost insane). I used the same code like the other guys, but the problem was the Keil startup file. The ARM processor supports different Operating Modes (User Supervisior, System ….). In the Keil startup file, the CPU will be switched into user mode after the initialization of the stacks. If the CPU is switched into the user mode (unprivileged mode), the CPU can not be switched back to the supervisor mode. If the CPU is switched into the user mode by the bootloader, parts of the startup file of application might fail, because certain registers can only be changed in a privileged mode (e.g. stack initialization). Instead of changing CPU into user mode, the CPU should be changed into system mode. Just changed the following line in the Keil startup file of the bootloader from: ; Enter User Mode and set its Stack Pointer MSR CPSR_c, #Mode_USR to: MSR CPSR_c, #Mode_SYS Futhermore I would suggest to deactivate the PFQ (pre fetch queue) in the startup file of the bootloader. In the startup file of the application, the FMI setting and the clock setting should not be changed (already set by the bootloader). Therefore you should change the following lines in the startup file. From : FMI_SETUP EQU 1 CLOCK_SETUP EQU 1 To : FMI_SETUP EQU 0 CLOCK_SETUP EQU 0 Alex

[pyv]

Posted on May 17, 2011 at 09:47

Thanks for the answer, Alex

I checked my code and it is already configured as you suggested in your post :-[ (files from ST Application Note IAP UART are configured as you suggested) The project seems to be as it should(FMI is executed from RAM and startup code of bootloader and user application are OK) I'm bit disappointed, so I did three tests. First Test : Testing jumping into same bankWhat I do:

• Donwloading UserApplication in bank 0 at adress 0x8 0000 via JTAG: Startup code: FMI is not checked, Stack and Heap Configuration are done. IROM1: start: 0x 8 0000, size: 0x8 0000 IRAM1: start: 0x400 0000, size: 0x 800 Programming algorithm: STR91xFxx4 Flash Bank0 address, range: 0x8 0000 - ..., erase sector is checked
• Donwloading Bootloader in bank 1 at address 0x0 via JTAG: Startup code: FMI is checked (BBSIZE: 32KB, BBADDR: 0x0, NBBSIZE: 512KB, NBBADDR: 0x8 0000), Stack and Heap Configuration are done. IROM1: start: 0x0 , size: 0x 8000 IRAM1: start: 0x400 8000, size: 0x1 0000 programming algorithm: STR91x_Bank1_32, range: 0x0 - ..., erase sector is checked

  Code:

  /* Jumping function called by Bootloader from Bank 1 */ void Execute_STR9Application(void) { pFunction Jump_To_Application; FMI->BBSR = 0x0; FMI->NBBSR = 0x6; FMI->BBADR = 0x80000 >> 2; FMI->NBBADR = 0x0 >> 2 ; Jump_To_Application = (pFunction) 0x80000; Jump_To_Application(); } What I expect:
  • STR9 executes the Bootloader program.
  • STR9 remaps bank 1 to address 0x8 0000 and bank 0 to address 0x0
  • STR9 jumps to address 0x8 0000
  • STR9 executes the Bootloader program. What I get: Nothing happens Second Test : Testing jumping into another bank Configuration of keil to download via JTAG same as for previous test (First Test) [/LIST]

    Code:

    /* Jumping function called by Bootloader from Bank 1 */ void Execute_STR9Application(void) { pFunction Jump_To_Application; FMI->BBSR = 0x0; FMI->NBBSR = 0x6; FMI->BBADR = 0x80000 >> 2; FMI->NBBADR = 0x0 ; Jump_To_Application = (pFunction) 0x0; Jump_To_Application(); } What I expect:
    • STR9 executes the Bootloader program.
    • STR9 remaps bank 1 to address 0x8 0000 and bank 0 to address 0x0
    • STR9 jumps to address 0x0
    • STR9 executes the UserApplication program. What I get: after jumping, the Bootlaoder program is executed (and not UserApplication as expected) Third Test : Testing jumping to 0x Configuration of keil to download via JTAG same as for previous test (First Test) [/LIST]

      Code:

      /* Jumping function called by Bootloader from Bank 1 */ void Execute_STR9Application(void) { pFunction Jump_To_Application; FMI->BBSR = 0x0; FMI->NBBSR = 0x6; FMI->BBADR = 0x0 >> 2; FMI->NBBADR = 0x80000 ; Jump_To_Application = (pFunction) 0x0; Jump_To_Application(); } What I expect:
      • After jumping, the Bootloader is executed What I get: This test is working. Comment I'm not too sure if address for IROM1, IRAM1 and programming algorithm are right. Maybe someone has already test it and knows if my test is correct or not.

[fabio239955_stm1_stmicro]

Posted on May 17, 2011 at 09:47

I would like to fix your attention on silicon revision of your STR912FA chip. In fact, silicon revision G has some problem on memory remapping (see the errata sheet for more informations. For example, I had to disable the watchdog on my program because the revision G doesn't allow a system reset).

Then, I had other problems with STR912F bank switching: it isn't allowed, but sorry, I don't remember why: it happened a year ago...

[pyv]

Posted on May 17, 2011 at 09:47

It's a pity ! thank you for your answers.

Other forum users talked about it (jmullens,jj,barricade,...) I hoped they would response but they seem busy with others problems ! I have to find an answer by myself. (I have already lost one week with this problem :-Y )

[alexanderpapsdorf9]

Posted on May 17, 2011 at 09:47

Hello Pyv,

The correct code snippet for switching from bank1 to bank 0 is (as you used in your second test) , assuming you have a STR9 version with a 512 Flash : void switch_bank(void) { pFunction Jump_To_Application; FMI->BBSR = 0x0; FMI->NBBSR = 0x6; FMI->BBADR = 0x80000 >> 2; FMI->NBBADR = 0x0 ; /* Jump to the user application and execute it */ Jump_To_Application = (pFunction) 0x00; Jump_To_Application(); } Your setting of your IRAM1 is incorrect! The start address of the IRAM should be in both cases i.e. for the boot loader and for the user application 0x400 0000. You can leave also size identical e.g. 0x10000 for 64 kB version or 0x18000 for the 96 KB version. Another point is the flashing of the application. Are you really sure that you are flashing in the right banks? What kind of debugger are you using? Bank 1 and the CSX (Chip Select Mapping) bit can only be written in ICP mode. A good example for changing the boot setting can flashing the application in the right bank can be downloaded from

http://www.keil.com/support/docs/3347.htm

. Concerning Fabio’s thoughts, the bug is fixed in the H revision of the chip. If you start a new design, that should not be a problem anymore. Alex

[s_bhujbal]

Posted on May 17, 2011 at 09:47

Dear All,

I also faced bank switching problem, but when I downloaded both codes ( IAP & Application programme )through RFlasher & I set LVD Threshold to 2.7V, it works fine. That is IAP driver also runs in bootloader mode( if push button pressed ) as well as aun application mode( if push button not pressed ). Thus bank switching is OK. But if I downloaded Application programme(bin file) through IAP with UART, Application programme doesn't work. I am using RIDE7 for compiling project, RFlasher for downloading IAP driver, Flash Loader Demonstrator ( V1.2 ) for downloading Application programme( bin file ) in Bank0. I read back chip for both the cases through RFlasher, Results are as follows, 1) Condition :- Full chip Erased Memory Locations & Its Contents 0000 0000 FF FF FF FF FF FF FF FF . . . 0008 0000 FF FF FF FF FF FF FF FF 2) Condition : -Only Application code( bin file ) downloaded through RFlasher Memory Locations & Its Contents 0000 0000 24 F0 9F E5 24 F0 9F E5 . . . 0008 0000 FF FF FF FF FF FF FF FF 3) Condition :- Only IAP code downloaded through RFlasher Memory Locations & Its Contents 0000 0000 6C F0 BF EF 6C F0 BF E7 . . . 0008 0000 FF FF FF FF FF FF FF FF 4) Condition :- IAP driver & Applicaion.bin downloaded through RFlasher In this condition both bank switching is OK & Application runs fine.Memory Locations & Its Contents 0000 0000 24 F0 BF E7 24 F0 BF E7 . . . 0008 0000 6C F0 BF EF 6C F0 BF E7 5) Condition :- IAP driver downloaded through RFlasher & Applicaion.bin downloaded through UART & ST Flasher. In this condition IAP driver is OK. I abled to download Application through UART but after that application doesn't run Memory Locations & Its Contents 0000 0000 FF FF FF FF FF FF FF FF . . . 0008 0000 24 F0 9F E5 24 F0 9F E5 I have confused with above results. Please reply if You have any clue for it, I have also spent two weeks for this. Sachin Bhujbal