Posted on September 07, 2005 at 06:10Hello,
I understand that the STR710 can have four externally accessible memory banks with CS Signal and BCON register each where you can define a constant number of waitstates for each bank.
I am looking for a way to have the EMI with dynamically inserted wait states with something like a BUSY/READY mechanism. Is there any workaround?
Thank you very much.
