str912fw44 jumping application from bootloader doesnt work!

karadaga · ‎2009-08-13

Posted on August 14, 2009 at 07:45

karadaga · ‎2011-05-17

Posted on May 17, 2011 at 09:59

Dear All,

I have searched most of messages in this forum and somewhere else. I couldnt still find a runnig iap code for str912fw44. I download ST's an2475 iap application note. I read ST's errata sheets also. But I still couldnt solve my problem. I have an bootloader code at Bank1. This code successfully gets some binary from the UART. It save it to Bank0 succesfully. (There happened no verification error etc.). I should also emphasise that the downloaded application can run when manually downloaded to the chip. The problem is when the application code is called from the iap it hangs.

I do the bank remapping just like the ST's application note except that

I give FMI->BBADR = 0x00400000.

Here is the remap code

void Execute_STR9Application(void) //From uVision I set it to work from RAM.

{

pFunction Jump_To_Application;

//Device is booted from Bank1

FMI->BBSR = 0; //Bank 1 size is 32K (IAP code at Bank 1)

FMI->NBBSR = 0x6; //Bank 0 size is 512K (User code at Bank 0)

FMI->BBADR = 0x00400000; //change IAP section to upper addres

FMI->NBBADR = 0; //Change user code section address to lower section

Jump_To_Application = (pFunction)0x00;

Jump_To_Aplication();

}

After this function call, when I debug it, the device jumps to reset addres which I am not sure if it is user startup or iap's startup. after the PC goes to 0x00c8 address it seems there are some strange code works. In dissasembly window I see all line start with ANDEQ ... Of course I dont expect the user code to be debugged in this way but the problem is

how can I understand at which point my code is? The user code or iap?

Actually some simple application which successfully remap the FMI and jumps from Bank 1 to Bank 0 will be very helpful to me.

Note: I compiled and successfully run the Keil Blinky example which run from the Bank 1. No problem with running on Bank 1

My Controller is str912fw44x6

I use Keil uVision IDE and Realview Compiler

Thanks to everyone

karadaga

alexanderpapsdorf9 · ‎2011-05-17

Posted on May 17, 2011 at 09:59

Hello Karadaga,

Just forgot to mention one modification in the IAP software. I changed in the IAP software the define ApplicationAddress.

Common.h :

From

#define ApplicationAddress 0x80000

To

#define ApplicationAddress 0x400000

Alex

alexanderpapsdorf9 · ‎2011-05-17

Posted on May 17, 2011 at 09:59

Hello Karadaga,

I am using also the Keil uVision but the STR912FAW44. You are right, the IAP application for the Keil uVision does not work.

I left the code in the function Execute_STR9Application() unchanged. But I had to do the following modifications.

In the startup file 91x_init.s :

1. Changed the No Boot Bank Address register from

FMI_NBBADR_Val EQU 0x00080000

To

FMI_NBBADR_Val EQU 0x00400000

2. Enabled the DTCM , enabled AHB waitstates and disabled the PFQ

; --- Enable 96K of RAM & Disable DTCM & AHB wait-states

; LDR R0, = SCU_BASE_Address

; LDR R1, = 0x0191

; STR R1, [R0, #SCU_SCR0_OFST]

; --- Enable 96K of RAM & Enable DTCM & AHB wait-states & Disable PFQ

LDR R0, = SCU_BASE_Address

LDR R1, = 0x0196

STR R1, [R0, #SCU_SCR0_OFST]

Make also sure that the application which you download into the none boot bank (your own application) leave the FMI settings unchanged. Normally you can easily disable the modification of the FMI registers in the startup code with the Keil configuration wizard if you uncheck the checkbox â€œFlash Memory Interface (FMI)â€�.

Hope it helps

Alex

karadaga · ‎2011-05-17

Posted on May 17, 2011 at 09:59

Dear Alex,

Thank you so much for your interest in my question. I have already done followings:

1. FMI_NBBADR_Val EQU 0x00400000

2. Disable FMI in application startup configuration

3. #define ApplicationAddress 0x400000

But some thing I havent tried yet was your

--- Enable 96K of RAM & Enable DTCM & AHB wait-states & Disable PFQ

suggestion.

For the moment I dont have my hardware sample. I hope I'll be able to implement your suggestions in a very short time.

I am going to write the results to this forum.

I also found a working iap code.

http://www.st.com/mcu/forums-cat-8189-21.html

But it only works at 48 MHz. I will also try this in 96 MHz.

Best regards,

lloydepowell · ‎2011-05-17

Posted on May 17, 2011 at 09:59

Hello Karadaga,

I also had much trouble getting everything set to jump into the app. But I am using Eclipse and OpenOCD. The most difficult thing was getting the CSx bit set. Without this, the two banks were always confused under Eclipse. I ended up having to write a custom JTAG interface under C++ to set the ISC_CONFIGURATION register. Every step of the ISP firmware and JTAG ini file was confusing, being discovered mainly by trial and error. Now everything is working except the switch to 96 Mhz as you mentioned.

Having read the AN2551 and figured out how to write and verify the Flash Config Cmd for 2 wait states and 96Mhz bus, it still doesn't run when I switch to PLL.

For prompt response, send a note directly to

mailto:lloydepowell@yahoo.com

Lloyd

tomas23 · ‎2011-05-17

Posted on May 17, 2011 at 09:59

I helped myself a bit by switching off the PLL until I jumped to the user application, then clock settings are configured again.

However I experienced some troubles later, so I decided not to remap the banks at all.

Just compiled user code to 0x0080000, used the original bootloader IRQ handler and jumped to the content of 0x0080000. I have got a solution for complete vector table in RAM, too.

Tomas

karadaga · ‎2011-05-17

Posted on May 17, 2011 at 09:59

I wonder if ST moderators think to make an explanation about this subject. As I see there is not any complete solution to this subject.