Posted on May 17, 2011 at 09:55Hi everybody,
Question about timer:
When a clear timer is done (TIM_CounterCmd(TIM0, TIM_CLEAR)), the register will be set to a reset value : 0xFFFC. (maybe somebody from ST can explain me this choice of design :D )
Means: if before, I have enabled an interrupt for the TO,
i will receive a interrupt during the roll from 0xFFFF to 0, immediately after the call of the function: timer clear followed by a start, is it correct ?By the same, I would know if everybody already tried to connect 2 Timer source of interrupt (ex : ICAP1 and TO) at the same time to a unique Timer?
Is it working ?In my case seems something wrong in the timer library (look code after: ST lib v2.0) : Impossible to set more than 1 interrupt at the same time.
Is it a silicium limitation, or just a error during the writing of the library ? Thanks in advance.
Any comments welcome.
Damien.
void TIM_ITConfig(TIM_TypeDef *TIMx, u16 TIM_IT, FunctionalState TIM_Newstate)
{
if(TIM_Newstate == ENABLE)
{
/* TIMx->CR2 = (TIMx->CR2 & 0x00FF) | TIM_IT; */
// previous code will remove a previously installed interrupt,
// Why this choice ?
TIMx->CR2 |= TIM_IT;
[ This message was edited by: dhoyen on 12-09-2008 12:15 ]
[ This message was edited by: dhoyen on 12-09-2008 14:36 ]
