SPI on uPSD

thadsmith · ‎2004-09-02

Posted on September 02, 2004 at 11:14

SPI on uPSD

thadsmith · ‎2011-05-17

Posted on May 17, 2011 at 12:01

On an 8032 product revision, I am considering using a processor with SPI interface. My preliminary checks indicate that the uPSD32xx series don't have SPI built in and uPSD33xx do. Two of our standard distributors list 32xx parts, but not 33xx.

What is the availability of the 33xx parts, who are the distributor sources, and how do the lead time and price compare with the 32xx? The 3212CV part is otherwise adequate for our needs.

Secondly, is it feasible to implement SPI in the uPSD32xx PLD area? If so, are there any references with example uPSD PLD implementation of shift register peripherals?

Thanks,

Thad

joseph2399 · ‎2011-05-17

Posted on May 17, 2011 at 12:01

The 33xx parts are sampling now. Have your distributor contact STMicroelectronics to request the samples you desire. Target production is August for all 33xx versions except the 3354 that is October.

Please check with your distributor regarding the pricing. If they don't have it, they should contact ST and request it.

The PLD in the 32xx is not large enough to implement a full SPI interface. If there are limited functions you desire, you may be able to implement them in the PLD. Perhaps someone on this forum has an example they can offer you.

javidaboo · ‎2011-05-17

Posted on May 17, 2011 at 12:01

It easy to implement a SPI (master) by just bit-banking i/o lines.

thadsmith · ‎2011-05-17

Posted on May 17, 2011 at 12:01

Quote:

On 2004-09-01 21:45, byteybird wrote:

It easy to implement a SPI (master) by just bit-banking i/o lines.

Yes, but I need the speed of a hardware implementation.

Thad

[ This message was edited by: ThadSmith on 01-09-2004 23:23 ]

javidaboo · ‎2011-05-17

Posted on May 17, 2011 at 12:01

Yes, but I need the speed of a hardware implementation.

---------------------------------------------------------------

Even at maximum hardware speed you might need to throttle back the speed in order to meet the the spi requirement of the device your talking to.

With the byte in a registor;

Repeat 8 time as in-line code (not loop);

Assert Enable i/o pin low;

Shift registor left 1-bit;

Move content of the carry bit to an i/o pin

Clock hi;

Clock lo;

:

Assert Enable i/o pin high;

A couple of additional lines of code if you need to do a MISO.

With the speed of this processor, that's could approach your requirements.

jdaniel · ‎2011-05-17

Posted on May 17, 2011 at 12:01

ByteBird,

Thad might not be saying that he has a problem with the actual transmission speed. It could be that there are other things he needs to do while the hardware is busy shifting in/out bits (as with interrupt-driven serial comms with the UARTs). In that case, it might be difficult to get around it.

Best Regards,

pHaze426