Interupts (FIQ)

[alexbrown1986]

Posted on September 19, 2007 at 17:24

Interupts (FIQ)

[alexbrown1986]

Posted on May 17, 2011 at 09:46

Hi there,

I am new to the ARM core and am trying to create an interrupt from the CM0 module in the MC controller. I have set up the path and the masks correctly but cannot see how to enable global interupts. Can anyone point me to documentation about this or explain how to enable / disable interupts.

[amira1]

Posted on May 17, 2011 at 09:46

Hi ab1986,

For enabling the interrupts, you should enable the VIC clock, enable the peripheral interrupt( MC_ITConfig : when using the STR91x stdlib), configure the ISR, the line, the mode and the priority for each interrupt (VIC_Config ) and enable the interrupt request line(VIC_ITCmd). Please find attached an MC example using FIQ interrupt. Best regards, mirou.

[sarao]

Posted on May 17, 2011 at 09:46

Hey Mirou,

Thanks as always for your responses. I just wanted to clarify a couple things. As I interpret your email, you state the following order for enabling interrupts: 1. Enable VIC clock 2. Enable Peripheral Interrupt 3. Configure the ISR, the line, the mode, and priority 4. Enable the Interrupt Request line But, as I read the source code:

Code:

<BR>... <BR> MC_ITConfig(MC_IT_CM0, ENABLE); // Step 2 <BR> SCU_AHBPeriphClockConfig(__VIC,ENABLE); // Step 1 <BR>... <BR> VIC_Config(MC_ITLine,VIC_FIQ,0); // Step 3 <BR> VIC_ITCmd(MC_ITLine, ENABLE); // Step 4 <BR>

Q: Is the order of step 1 & 2 important? Q: If so, which is correct order? Again, thanks always for your support in these issues. -Jeremy [ This message was edited by: jsarao on 19-09-2007 20:55 ]