How to operate MC Controller?

[jomedfree]

Posted on January 03, 2010 at 22:43

How to operate MC Controller?

[jomedfree]

Posted on May 17, 2011 at 10:00

I an trying to operate the MC controller in polling mode in order to generate to successive bursts at two different frequency.

I use a code like: ... (after initialisation in 16 bits PWM mode, FREQ_PWM=24MHz) ... MC->CMP0= 359; // Period PWM (360-1) MC->CMPU= 179; // Period PWM/2 for 50% cycle MC->REP= 9; // 9 Iterations MC->IMR= 0x10; // ADTE=1 to allow ADT flag (but GPIE=0 to stay in polling mode) MC->PCR0= 0xA1; // ODCS=1,PCE=1, DTE=1, to start signal generation MC->OPR= 0x00; // to allow output signal with dead time MC->IPR= 0x00; // to clear IT flags (ADT) MC->CMP0= 319; // to prepare next Period PWM (320-1) MC->CMPU= 159; // Period PWM/2 for 50% cycle MC->REP= 15; // 15 Itérations for next burst while (!(MC->IPR & 0x10)); // wait for first burst completion (the second burst must start here automatically) The repetition counter for burst #2 is not updated with the proper value, so my questions are: - is it possible to use the MC in polling mode in this way ? - is the Repetition Counter updated during ADT with the preload value (the value in MC->REP)? - does anyone has a exemple of how to operate the MC (the exemple that comes with the ST library is too simple and the user manual not user friendly as ever) Thank you all and Merry Christmas to all STR9 forum contributors & readers

[tomas23]

Posted on May 17, 2011 at 10:00

Hi, how many PWM cycles do you experience before the ADT flag is signalled? 1, 9 or 15?

In HW update mode, the RM tells that MREP is updated on the update event, thus I guess it's in preload register, too, and you may overwrite it to 15 instead of 9...[ This message was edited by: edison on 27-12-2009 21:06 ]

[tomas23]

Posted on May 17, 2011 at 10:00

Hi, this seems little bit strange. Does the MREP change to 15 occur after 2nd series of 9 periods or not at all? (I suppose the MC only takes the U, V, W channel preload configuration after first 9 periods, but doesn't change the MREP?)

If not, I'd recommend to wait for first ADT and force the MREP value in SW update mode... Please report your progress.

[jomedfree]

Posted on May 17, 2011 at 10:00

The first burst of 9 PWM cycles is correct but the second burst is composed of still 9 cycles instead of 15 as we can expect.

In fact the RM is not clear on the fact that the repetition counter is buffered by a preload register or not. So the logic that governes the repetition counter update needs clarification. Is there a ST engineer following this forum who can bring some explanation? Thanks,

[jomedfree]

Posted on May 17, 2011 at 10:00

Yes, it looks like the REP counter reload value is updated for the 3rd burst with the value expected for the 2nd (just set after launching the first burst)!

I absolutely need to keep aperfectly known timing, it is why I wanted to use the ADT mode along the whole bursts. Do you think I can switch temporarily from ADT to software update mode and just change the REP counter, then go back to ADT for the CMPU and CMP0 reload? it sounds a bit acrobatic... Again, there must be again a known logic that govern this MC stuff, so if there is a ST engineer online, please give us the key! Thanks,

[tomas23]

Posted on May 17, 2011 at 10:00

Hi jomed, it confirms my thought: the MREP works as a preload, as (vaguely) described in the RM. You can help yourself with the SW update mode, it's a standard procedure used in motor control libraries for different MCUs in ST portfolio. Be careful, which values will be written at the time the SW update is activated.

Try a different approach - set MREP to 9 BEFORE you start the MC peripheral in SW mode, switch to HW mode, prepare MREP to 15 and run the MC. Maybe this helps... You see the difference - the MC should know already the MREP=15 after first 9 cycles. Btw. I am ST support engineer, currently on my vacation ;) [ This message was edited by: edison on 28-12-2009 16:27 ]

[jomedfree]

Posted on May 17, 2011 at 10:00

Edison,

Nice to read that you are part of ST support. You may have access to better MC documentation then? Because discovering how this MC stuff work by changing the code and testing what happens is not very interesting and may leave burried potential bugs. Again, the MC is just a logic state machine, so they must be a way to make it works by understanding how it was logically design. Is it the same MC I can find in another ST device (then we can check the doc of this device) Thanks again for your help,

[tomas23]

Posted on May 17, 2011 at 10:00

MC peripheral (or timers with MC features) keep evolving in every new family, so no other doc is available on our level.

You have to try to break into the working model, but there is no record of any mistake in whole history of STR9 MC peripheral. Myself, I believe in what I suggested to you :)

[jomedfree]

Posted on May 17, 2011 at 10:00

The way the MC_REP counter is updated when the PWM counter is active in ADT mode is still a mistery for me!

Then, I have switched to a cycle by cycle update keeping then the MC_REP to 0 and it seems OK now. The issue now is that I can't test the burst generation 2 times, the MC is stucked if I try to do it the second time. It must be related to the security feature even if I inhibited it (DISEST=1 in MC_PCR1). If someone has an idea on how to fully desengage this security locking function?