F262: LVD and Vdd rise time

mnardiello9 · ‎2004-11-02

Posted on November 03, 2004 at 05:42

mnardiello9 · ‎2004-10-27

Posted on October 27, 2004 at 15:07

I have a big doubt with the LVD specifications for the ST72F262:

In a former datasheet (Dec. 2003) I found that LVD works with Vdd max. rise time of 100ms/V; now the new release of the datasheet states that max. rise time is 20ms/V.

We have 900 boards already assembled, and Vdd rise time is 40ms/V: is it still a safe value for the LVD to work properly ? Can anybody explain what could happen internally if the rise time is too slow ?

We have only a 100nF capacitor between Reset and GND, no pullup resistor.

Thank you

itsmejatinus · ‎2004-11-02

Posted on November 03, 2004 at 05:42

Yes, it was an error in the datasheet(100ms/V). Actually it was 100ms/5Volt => 20ms/V. I think with 40ms/V, the functioning may not be guaranted but should be ok if you do not use pull up on reset.