EFT on ST92F150CR1

wkissing · ‎2004-04-15

Posted on April 16, 2004 at 07:00

EFT on ST92F150CR1

wkissing · ‎2011-05-17

Posted on May 17, 2011 at 11:36

I want to implement timer interrupt service routine on EFT.

(An overflow occurs when the counter rolls over from FFFF to 0000h)

Timer interrupt is occurred by my codes only one time , then neve come back

to ISR.

to clear TOF bit and EFT interrupt flags is done in EFTimerIntEndCount(my code below).

what's wrong?

Please, shows me your smart answers.

MODEL : ST92F150CV1

void EFtimerInit(void)

{

spp(EFT0_PG);

E0_CR2 = 0x00; /* INTCLK/4 */

E0_SR |= Et_tof ; /* Timer overflow */

E0_CR3 |= Et_eftis; /* Global timer interrupt selection */

E0_CR1 |= Et_toie; /* Timer overflow interrupt enable */

}

EFtimerIntInit(void)

{

di()

spp(EXINT_PG);

asm(''nop'');

EIVR |= 0x10;

EIPLR |= 0xFF;

EITR |= 0x04;

EIPR |= 0x00;

EIMR |= 0x04;

Ei();

}

#pragma interrupt EFtimerIntEndCount

void EFimerIntEndCount(void)

{

spp(EFT0_PG);

E0_SR;

E0_CLR; /* to clear TOF bit */

spp(EXINT_PG); /* clear all EFT interrupt flags */

EIPR = 0x00;

}

[ This message was edited by: annette on 16-04-2004 09:27 ]

[ This message was edited by: annette on 16-04-2004 09:35 ]

ritu · ‎2011-05-17

Posted on May 17, 2011 at 11:36

Hello ,

It seems even the first interrupt request that you are getting is not due to actual timer overflow , but because you are setting tof flag in the initialization routine which should be avoided as its generating a spurious interrupt request , rather flag clearing sequence (reading of SR followed by reading of CLR register.) should be executed during initialization to avoid any spurious interrupt request. It seems your PC is getting lost due to some other spurious interrupt request or EFT is not counting due to some reasons after you execute first interrupt request.

In your code you do

EIPR |= 0x00;

EIMR |= 0x04;

It should be actually EIPR &= ~0xFF; (To reset all the pending bits.)

EIMR &= ~0xFB; (To set just the interrupt channel corresponding to EFT0)

Also there should be a while(1) statement in the end which serves as an endless loop waiting for interrupt event to occur.

If you want to program your EIPLR register (Assigning higher priority to channel INTB0) corresponding bits should be programmed as 0x00

EIPLR | = 0xFF does not serve any purpose.

Ritu