Chip Select on ST10F168 Micro.

glyn1 · ‎2004-05-27

Posted on May 27, 2004 at 14:52

glyn1 · ‎2004-05-26

Posted on May 27, 2004 at 08:44

Hi,

I am trying to set up the CS1 and CS2 to be active for the same block of memory one for read and one for write. I have got the Port 0 set up correctly to enable all 5 Chip Select lines and all of which seem to work. However when I set BUSCON1 = 0x44AE; ADDRSEL1 = 0x0500;BUSCON2 = 0x84AE;ADDRSEL2 = 0x0500; i.e. CS1 read CS2 write then CS1 stays permanetly high but CS2 works as it should.

Has anyone seen any similar problem?

Thanks

Glyn.

charles239955_st · ‎2004-05-27

Posted on May 27, 2004 at 14:28

Hi Glyn,

This is a normal behavior. You can not assign two CS to the same address range. In all ST10 devices, the memory windows defined by the Busconx/Addreselx pairs can overlap. Therefore a priority mechanism is implemented. In case of overlap, the memory window is accessed with the setting of the pair with the highest number (check the F269 user manual section 9.4.2).

In your case it is always the CS2 that is used and never the CS1.

The bit CSWENx and CSRENx are not meant to set write or read access only but are defining the length of the CS signals (check section 9.3.7)

Regards,

Kenshin

glyn1 · ‎2004-05-27

Posted on May 27, 2004 at 14:52

Thanks Kenshin,

That explains what is happening. I will have to sort the Hardware side out to match.

Glyn