Posted on May 27, 2004 at 14:52Thanks Kenshin, That explains what is happening. I will have to sort the Hardware side out to match. Glyn

Posted on May 27, 2004 at 08:44Hi, I am trying to set up the CS1 and CS2 to be active for the same block of memory one for read and one for write. I have got the Port 0 set up correctly to enable all 5 Chip Select lines and all of which seem to wor...