2014-10-28 11:50 AM
I would like to know if bringing up both the Vdd_IO and Vdd lines at the same time on the LSM9DS1 is hazardous for the unit or problematic for its functioning. Why must the rails be brought up in sequence and what problems might I face if I bring them up at the same time?
I have a slew rate controlled switch, but my lines to Vdd_IO and Vdd are tied together. Before I do the board rework I was curious what problems I might see if I simply brought both lines up at the same time. Any insight is much appreciated. #lsm9ds12015-03-05 07:20 AM
Bump. I would like to know the same thing.
2016-08-05 05:56 AM
Me too.
2017-02-08 02:12 AM
Hello all,
I also had the same question.
However looking at the schematics of the LSM9DS1 eval board (
) and the relative ST MEMS adapters motherboard () it's possible to see that the Vdd and Vdd_IO pins are connected toghether into the motherboard. This violates what is written in the datasheet. So what's wrong, the datasheet or the motherboard schematic?Thank you. Best regards,
Massimo
2017-02-09 02:35 AM
If you use the same power supply for Vdd_IO and Vdd you can connect the pins together. It is common practice. From my experience, I don't remember any issue with this approach. In datasheet is recommended power-up sequence, it is mainly valid in case of Vdd_IO is not equal Vdd.
2017-02-09 02:45 AM
Hi Miroslav,
it was not explicitly reported in the datasheet so I raised the issue. Thank you very much for your reply.
Best regards,Massimo