2021-01-18 02:14 AM
Hi,
I want to drive an ISM330DHCX by an FPGA using SPI. Due to the fast operation and the exact timing I can realise this way, a few questions occured.
Solved! Go to Solution.
2021-01-29 01:47 AM
Hi Eleon,
thanks for the information.
Regarding DEVICE_CONF in CTRL9_XL I opened an issue on Github, and I received the answer that it is a bug indeed. They will fix it in the examples.
Regarding the other issues, I implemented a minimum time for CS=HIGH of 100 ns, as you recommended. I did some tests with a commercial ISM330 modul, but the problems were still present. Than I changed the modul, now using our own small sensor board. Now, it seems to work correctly. So, for the moment there is no open question any more. If there might be new issues later on, I'll be back here.
Best regards
Axel
2021-01-18 08:25 AM
Hi @Community member ,
Let me check if I can answer to your question:
-Eleon
2021-01-29 01:47 AM
Hi Eleon,
thanks for the information.
Regarding DEVICE_CONF in CTRL9_XL I opened an issue on Github, and I received the answer that it is a bug indeed. They will fix it in the examples.
Regarding the other issues, I implemented a minimum time for CS=HIGH of 100 ns, as you recommended. I did some tests with a commercial ISM330 modul, but the problems were still present. Than I changed the modul, now using our own small sensor board. Now, it seems to work correctly. So, for the moment there is no open question any more. If there might be new issues later on, I'll be back here.
Best regards
Axel
2021-02-01 05:28 AM
Hi @Community member ,
thank you very much for your reply and for describing your solution.
Can I ask you which module are you using? Has you code designed and customized for it? This may be the reason for which the module with ISM330 it is not working well...
-Eleon
2021-02-03 01:06 AM
Hi Eleon,
there is no special code for the module. But the commercial module is designed for both 5 V and 3.3 V operation. Within the SPI data and clock lines there are transistors for voltage adaptation, for CS there is a diode. I assume (just an assumption so far, I didn't test) this is the reason for being not as fast as our own module, which is designed for 3.3 V only - there is no component on board, which is not essential. This "pure" design seems to perform well, i.e. at the speed one can expect from reading the data sheet.
If there is a chance of an update of the data sheet, the "minimum CS HIGH time" between two consecutive SPI cycles should be added. I didn't test the absolute minimum value, but your 100 ns are already quite good (in fact it is just a single 10 MHz clock period).
best regards
Axel
2021-02-08 02:05 AM
Hi Eleon,
finally I did a test - it's the diode. Removing the diode speeds up the communication, i.e. the time between two bus cycles is decreased.
best regards
Axel
2021-02-08 02:16 AM
Hi @Community member ,
thank you again for reporting your further investigation!
-Eleon