2023-09-05 04:46 AM
Hi!
How much capacitance is to be expected in SCL and SDA inputs for IIS2DLPC? I couldn't find it in the datasheet.
Thanks in advance.
2023-09-05 06:58 AM
Hi @Alejandro Bizzotto ,
Welcome to ST Community!
Certainly must not exceed the specification capacity limits found in the literature, for example in this document.
However, it is not recommended to put capacitances on the I2C lines. Indeed, the capacitance creates with the resistor an RC filter which attenuates the clock front, and by increasing the capacitance, the clock may no longer a square wave, and the I2C stops working.
If my reply answered your question, please click on Accept as Solution at the bottom of this post. This will help other users with the same issue to find the answer faster
2023-09-06 05:10 AM
Hi Federica,
May be I didn't phrase that correctly, I mean: how much is the input capacitance of the SDA and SCL pins themselves at IIS2DLPC?
for example, here is the spec for an eeprom:
2023-09-07 07:55 AM
Hi @Alejandro Bizzotto ,
Got it. Unfortunately we can't provide this information, it is reserved.
If my reply answered your question, please click on Accept as Solution at the bottom of this post. This will help other users with the same issue to find the answer faster.
2023-09-08 03:11 AM
Reserved means secret? if yes: now can we calculate the proper value of the pullup resistors then?
in p.2 is clearly stated that the necessary resistance is a function of the capacitance of the bus, then we need to consider every capacitance in the bus, we need to know the value of the input capacitance of every chip in that bus!