SR5E1E7 DCF programming

[sacha]

Hi !

We are using an SR5E1E7. We want to put it as LockStep (both core and dma).
So we have to setup the register 'Global System Configuration' / SYS_CFG_REG.
We seen that we need to use the DCF.

Do you have any example / file to setup this mcu like this ? We couldn't find any document on the web, execpt the MPC5xxx DCF configuration from NXP.

Here some question we had:
- How can we calculate this ? Have you any DCF configurator xsl like NXP are doing ?
- To set the Cores as Lock Step and the DMA as Lock Step, we need to only write to the 'Core Enable and LS
Configuration' of the DCF ? With the value being the one we want in the 'Global System Configuration DCF' with the exact same mapping. '0b00000000000000010000000100000011' in our case, all core enabled and all lock step set

- Does this step can be done at runtime ? By directly addressing the adr 0x1FF80398 ?
- Or is this only accessible during JTAG programming ? So we can create the dcf_map in a specific .dcf section that will be flash using openocd to the right section ?

We are a little bit confused on how to do this, If you could gave us some hint or redirect us to the right example that would be nice.

Thanks in advance,
Sacha

[sacha]

From the datasheet, the DCF can be programmed when the application code is written:

And the UTest partition can be access through the partition 0 of the flash array memory:

Which tell that the BOF-UT contain all the 16K of the UTEST memory map. In the Partition 0 ('0x18000000'). BOF-UT is located at 0x1FF80000. Does that means that I have to flash to the address 0x1FF80000 or do I have to flash to the address 0x18000000 + 160K (If the memory where continous)

But in any case:

This is from openocd running "flash banks"

I have to flash to the `0x18000000` section which correspond to the sr5e1.3.flash. but that section has a size of only 0x28000 aka the 32K +  64K + 64K of BOF0, BOF1, BOF2.

Can I really use openocd to flash that UTEST partition ? It seems that UTEST is not accessible to openocd ?  

[42Bastian Schick]

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@sacha wrote:

Hi !

We are using an SR5E1E7. We want to put it as LockStep (both core and dma).
So we have to setup the register 'Global System Configuration' / SYS_CFG_REG.
We seen that we need to use the DCF.

Do you have any example / file to setup this mcu like this ? We couldn't find any document on the web, execpt the MPC5xxx DCF configuration from NXP.

Here some question we had:
- How can we calculate this ? Have you any DCF configurator xsl like NXP are doing ?
- To set the Cores as Lock Step and the DMA as Lock Step, we need to only write to the 'Core Enable and LS
Configuration' of the DCF ? With the value being the one we want in the 'Global System Configuration DCF' with the exact same mapping. '0b00000000000000010000000100000011' in our case, all core enabled and all lock step set

- Does this step can be done at runtime ? By directly addressing the adr 0x1FF80398 ?
- Or is this only accessible during JTAG programming ? So we can create the dcf_map in a specific .dcf section that will be flash using openocd to the right section ?

We are a little bit confused on how to do this, If you could gave us some hint or redirect us to the right example that would be nice.

Thanks in advance,
Sacha

---

Any success in flashing DCF?

[sacha]

None using openocd, we did had succeed using a uTrace32 from Lauterbach

[42Bastian Schick]

Ah, cool. I have a T32. Did you do anything special? Can you share the steps?

[FSPIL]

In attach you can find the script to program a DCF record with StellarLINK to enable boot from Flash at the USER VTOR ADDRESS.

Please follow these steps in order to configure the device by programming the DCFs in UTEST area:

1. Copy the script "SR5E1_SDKE_VTOR_ADDR.cfg" in C:\StellarLINK\openocd\scripts\utility

The script searches the first free address in the UTEST area and here programs the value 0x0200000C08000000:

• USER VTOR ADDR DCF: &0x0200000C.

Refer to the Table 92. DCF client list in the section 7.4.1 DCF client list of RM0483 rev5.

• User VTOR Flash address: for example, 0x08000000.

Note: the search in UTEST area configured in the script is only an example and starts from address 0x1FF8_0388.

The first free address on a virgin production SR5E1 sample is at address 0x1FF8_0398, that is the "UTEST DCF Records".

1. Run the script from command line :

C:\StellarLINK\openocd\bin\openocd.exe -d0 -s C:\StellarLINK\openocd\scripts -f utility\SR5E1_SDKE_VTOR_ADDR.cfg

1. The update of VTOR ADDRESS or to program another DCF, simply change the value at line 77 in the script.

To enable the Lockstep feature, program the 'Global System Configuration DCF', that is:  0x0200000000000100

• Global System Configuration DCF: &0x02000000,
• LS_CORE1_2=1 (Lockstep for Core1 and Core2 enabled - Lock configuration): 0x00000100.

Note: the SR5E1 is affected by DAN-0055207, therefore the setting of LS_DMA=1 has no effect. The DMA subsystem is always in lockstep mode.

First complete the device configuration, by adding the required DCFs, then program the code in Flash.

[42Bastian Schick]

Ok, thanks so far.

Would you share also the original PRACTICE (.cmm) script. I see T32 commands in the comments.

TIA

[FSPIL]

In attachment.

regards,

Francesco

[42Bastian Schick]

Great, thanks.
I wonder, the manual says UTEST is OTP. So Once LOCKSTEP is set, how can I go back?

Just write another DCF with value 0?
So BAF will use the latest one it finds?

[FSPIL]

The LockStep feature is permanent because the Global System Configuration DCF is write once.

Please refer to Table 92. DCF client list, the first item.

The user can write more times the Global System Configuration DCF but the next writes are dummy, only the first value is recognized and applied.

regards,

Francesco