SR5E1E5 external crystal design

[Sreenidhi]

In the datasheet it is given at 40MHz the max C_L is 8pF (from AN6027), but the C_L in the design schema has C1 and C2 8pF(UM3305), which gives 4pF, could you suggest me with the external crystal oscillator design. And the range is from 4MHz to 40MHz,  so if for a chosen crystal , should the minimum frequency satisfy this condition ?

[AScha.3]

So take a 16M crystal and 2 x 8pF , and it should work.

And if you dont want to bother around with 8 or 10 pF , just choose a crystal oscillator.

Now just some cents more expensive than a crystal, but you know what it will do: put out xx MHz .

I use for reliable designs only oscillators. ymmv .

[Sreenidhi]

Hello, if I use XOSC freq of 16Mhz, will my max ADC frequency be 40Mhz ? Or will it cause any issues ?

[AScha.3]

Hi,

the internal clocks you set with the PLL settings, the external crystal or oscillator is just the reference clock.

>if I use XOSC freq of 16Mhz, will my max ADC frequency be 40Mhz ? 

If you set the PLL and the ADC according...yes.

+

If you want PLL1 drive by the XOSC , so just take an 40M oscillator as clock source.

example, see mouser: