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Problem with ADC on the Bernina

Vitaliy Anzin
Associate

‎2018-08-27 03:02 AM

Hello,

I've got a problem with max analog channel input voltage. When all supply voltages are 5V everything is fine. But if VDD_HV_IO_MAIN voltage is 3.3V while VDD_HV_ADV is 5V, the analog channel input voltage becomes limited over 4V. This problem is observed both on my PCB and on the EVB (SPC57xxMB + SPC58XXADPT176S REV. B). Can you help me resolve the problem?

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1 REPLY 1
Vitaliy Anzin
Associate

‎2018-08-28 12:17 AM

More test results for the problem: MCU temperature increases for 6-7 degrees. It seems the analog channel internal circuit scheme protection is referenced by VDD_HV_IO_MAIN (instead VDD_HV_ADV). Сan someone clarify this?

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