How to modify UTEST DCF Client?
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‎2021-03-11 2:44 AM
Hello! I've tried to modify UTEST DCF Client but some questions (below) appeared to me.
- In RM0349 on the page 260 I see the it's Reset value. How can I read it? UTEST Flash memory with the address 0x00400308 is empty.
- At the same table I see "offset" column. Which means this offset? Address in flash or only Address bits of current DCF record?
- How can I ensure that my values are successfully loaded in MCU? Which registers should I check? I'm coding via SPC5 Studio and debugging via UDE STK. My MCU is SPC570S40E1.
- How can I modify values in this memory? I need reflash new data with the same CSn at next free address UTEST DCF Client, right?
Sorry, I'm new here and maybe I've done something wrong. This is mine post below:
https://community.st.com/s/question/0D53W00000NBVl1SAH/enabling-lockstep-core-in-spc570s-mcu
Upd:
I've found AN4557. And now I really don't undestand anything in the DCF records. How to make CS field? etc...=(
Thank you,
Nikolay Mannhof
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‎2021-06-03 2:09 AM
Hello Manhof ,
There is an interesting document in NXP side
it is the same IP
to modify a record , it is OTP.
there is a possibility to overwrite it cf chap 3.5
Best regards
Erwan
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‎2021-04-06 1:44 AM
Hello,
I remind about this question.
Thank you,
Nikolay Mannhof
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‎2021-04-13 10:29 PM
Hi Nikolay
I was able to read and write this area using the Multilink Universal + ICDPPCNEXUS eval version bundle.
As in your case, the UTEST DCF records area is empty. Tell me, is your processor starting up? I do not get to main (), init process loops on some checks.
Best regards,
Zharov Maxim
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‎2021-04-14 12:55 AM
Hi Maxim.
Yes, MCU starting up. But only if it clocking from IRC. Try to disable in all RUN modes XOSC start.
Clocking from XOSC isn't starting due to internal loading capacitors. Capacitors's value changeable via DCF UTEST Flash memory area.
Thank you,
Nikolay Mannhof
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‎2021-04-19 11:48 PM
Hi Nikolay
My result - processor starts with quartz 8 & 16 Mhz without any change of UTEST DCF. Significant factors was 1) tracing of 1.2 V line (general polygon, 0.1 uF+2.2 uF at each pin), and 2) proper peripherial init in programm.
Best regards,
Zharov Maxim
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‎2021-06-03 2:09 AM
Hello Manhof ,
There is an interesting document in NXP side
it is the same IP
to modify a record , it is OTP.
there is a possibility to overwrite it cf chap 3.5
Best regards
Erwan
