DMA re configuration

[Basavanagouda1]

Hi All,

We are using different ADC group to access DMA channel. We have 3 ADC groups, Group1 ADC channel need to read continuously. So it should stop the other ADC channels to accessing the DMA. If it is accessing, it should stop it and reconfigure with Group1 configs. 

We are using below line of code to do it. Please let us know, is this the correct way or we need to check some other registers?

 edmaChannelStop(adcp->adc_dma_channel);

#define edmaChannelStop(channel) {                     \

 edmaDisableRequest(channel);                       \

 edmaClearDone(channel);                         \

}

#define edmaDisableRequest(channel) (SPC5_EDMA.CERQR.R = (uint8_t)(channel))

#define edmaClearDone(channel) (SPC5_EDMA.CDSBR.R = (uint8_t)(channel))

Thanks,

Basava.

[Erwan YVIN · Accepted solution]

Hello ,

You can use this API

edmaChannelStart(adcp->adc_dma_channel);

edmaChannelStop(adcp->adc_dma_channel);

Do not forget to setup your edma channel

/* Setting up DMA TCD parameters.*/
 
 edmaChannelSetup(adcp->adc_dma_channel,                                  /* channel.                */
 
                  src,                                                    /* src.        */
 
                  adcp->samples,                                          /* dst.                    */
 
                  4,                                                      /* soff, advance by four.  */
 
                  2,                                                      /* doff, advance by two.   */
 
                  1,                                                      /* ssize, 16 bits transfers.*/
 
                  1,                                                      /* dsize, 16 bits transfers.*/
 
                  (0xBFFFFFFFUL) &                                         \
 
                  ((CPL2((uint32_t)adcp->grpp->num_channels * 4U) << 10U) | \
 
                  (2U * (uint32_t)adcp->grpp->num_channels)),             /* mloff and nbytes.       */
 
                  (uint32_t)adcp->depth,                                  /* iter.                   */
 
                  CPL2((uint32_t)adcp->grpp->num_channels * 4U),          /* slast.                  */
 
                  CPL2((uint32_t)adcp->grpp->num_channels *
 
                       (uint32_t)adcp->depth *
 
                       sizeof(adcsample_t)),                              /* dlast.                  */
 
                  EDMA_TCD_MODE_DREQ | EDMA_TCD_MODE_INT_END |
 
                  ((adcp->depth > 1U) ? EDMA_TCD_MODE_INT_HALF: 0UL));    /* mode.                   */
 
 

in Low level configuration ,

we are using only 2 ADC channels with edma.

Best Regards

Erwan