STM32 MCUs Embedded software

Hello everyone,I’m currently working on setting up UDP communication using NetX Duo with a static IP address, configured through STM32CubeMX (IOC) in nucleo n657x0-q.Please note that the UDP communication needs to be initialized and executed in the Application (APPLI) — not in the FSBL.I’ve gone through several related threads in the community, but I still haven’t managed to get the communication working properly.Could someone please provide a clear, step-by-step explanation or example of how to configure and initialize UDP communication (client or server) with a static IP in NetX Duo under APPLI?I would greatly appreciate details on:The correct IOC configuration (Ethernet, NetX Duo, IP, UDP, MPU etc.)The proper initialization sequence in APPLI (how and when to start the network and socket)Relevant NetX Duo API functions (e.g., nx_udp_socket_create, nx_udp_socket_bind, nx_udp_socket_send, nx_udp_socket_receive)Common issues or pitfalls when moving UDP handling from FSBL to APPLIThank y

Hello superhero MCU enthusiasts,I'm playing with the STM32N6570-DK and have created a simple project with an FSBL that initializes the MCU and boots the Appl. Once booted, the Appl flashes a "Hello World" LED.Both can be loaded to external flash using the STM32CubeProgrammer.Now, I'm trying to map external PSRAM (XSPI1 -> 0x90000000) inside the FSBL, but it fails.To do that, I change a line in a file in the FSBL, stm32_extmem_conf.h, line 35 of (PSRAM disabled):#define EXTMEM_DRIVER_PSRAM 0Now I try to enable and map the external PSRAM by setting the definition to 1:#define EXTMEM_DRIVER_PSRAM 1However, it doesn't succeed.When debugging I see we land into a HardFault.The FSBL generates a HardFault when executing SAL_XSPI_EnableMapMode, because the function HAL_XSPI_MemoryMapped fails.I can't find the cause.Anyone?I posted a project here with a short Readme.md:https://github.com/AngryCarrot61/STM32N6570-DK_004Note: to see FSBL and Appl working one has to set EXTMEM_DRIVER_PSRAM

Hi,I'm try to communicate between my windows pc and my STM32GOB1RE Nucleo 64 board, with the CDC Class.To validate my hardware ( PA11 PA12 and gnd connected to usb pc), i did few dfu flahsing operation with CubeProg without issue. Windows detect properly my device in DFU mode, i can do the programmation and new firmware runs well. -> Hardware looks fine.  I have generated the code with CubeMX and i'm using the HSI to 60mhz. Just this simple code with USB_DRD_FS Usb clock derived from it at 48Mhz.I'm also using the SOF detection and CRS SYNC Source USB.I have added th Code line in usbd_cdc_if, but it is not really the problem.Windows generate Error of not Descriptor reading.Here is the log of the USB Device Viewer, a windows tool that bring information:[Port7] FailedEnumeration : Périphérique USB inconnu (échec de demande de descripteur de périphérique)[Port7] FailedEnumeration : Périphérique USB inconnu (échec de demande de descripteur de périphérique) Is Port User

Hello,   I have been following a few different Ethernet tutorials for my MCU (STM32H750VBT6TR) I have on a dedicated PCB. Thus far, I have been unable to get a simple ping test working. For reference, I am mostly using this tutorial in combination with this one, but I am not using freeRTOS at this time. I simply want to get LwIP to set up correctly and ping the board so I can then adapt it to a UDP server.   I know my memory locations for the rx/tx designators, and rx pool base, and the LwIP heap are in the right locations (assuming they are as the tutorial states), but my code fails when the LwIP.c file calls netif_add(), which makes me think the issue does not lie within the memory.   Can anyone who is more experienced in simple LwIP implementations help me out here? I am not sure where to turn at this point, as it does not seem people on other posts are having the same issues. I will attach my project files, namely the IOC, so anyone can look to see if there are

Hello,I am trying to set up an external flash memory (MX25V1635F) on a Nucleo-U575ZI-Q.I have successfully used the low-level drivers (LLD) from the manufacturer Macronix and integrated them into the Levelx functions. (more info : https://community.st.com/t5/stm32-mcus-embedded-software/difficulties-using-fx-media-format/td-p/845435 )Also, i use FileX to formand open my media, and it seems to work :  UINT ret = FX_SUCCESS; /* USER CODE BEGIN MX_FileX_Init */ lx_stm32_nor_custom_driver_initialize(&nor_flash); /* USER CODE END MX_FileX_Init */ /* Initialize FileX. */ fx_system_initialize(); /* USER CODE BEGIN MX_FileX_Init 1*/ /* Format the NOR flash as FAT */ status = fx_media_format(&nor_flash_disk, fx_stm32_levelx_nor_driver, // Driver entry (VOID*)NOR_CUSTOM_DRIVER_ID, // Device info pointer (UCHAR*)media_memory, // Media buffer pointer sizeof(media_memory), // Media buffer size "NOR_FLASH_DISK", // Volume Name 1, // Number of FAT

  Hi ST team, I’ve been testing I3C Target mode on STM32H563 using CubeH5 HAL.In mixed write/read transactions such as: START + DEV_W + DATA1 + RESTART + DEV_R + … + STOP   the Target cannot know in advance how many bytes the controller will write before RESTART.However, HAL requires me to specify a fixed length when calling: HAL_I3C_Tgt_Receive_IT(&hi3c1, rx_buf, RxBufSize);   and later, at frame completion (FCF), the driver checks: if (LL_I3C_GetXferDataCount(hi3c->Instance) == hi3c->pXferData->RxBuf.Size) HAL_I3C_TgtRxCpltCallback(); else hi3c->ErrorCode = HAL_I3C_ERROR_SIZE;   In real usage, the controller might send only one byte (e.g. a register offset) before RESTART.This causes HAL_I3C_ERROR_SIZE even though the transfer is perfectly valid. Questions / suggestions Is this strict == Size check intentional?It seems unrealistic for Target side to know the controller’s write length. Can HAL provide a “short frame allowed” opti

On a couple of internally developed boards based on an architecture combining an STM32F407 and a KSZ8863RLL, I have experienced failures on the latter chip that I cannot explain. The issue manifests as intermittent communication with the TCP client that pings the board. Occasionally, it seems that some packets are lost, causing the communication to drop out and then resume, only to fail again after a short while. I suspect that the environment in which the board is used might be subject to ESD events or overvoltage conditions caused by imbalances in the differential voltage on the bus. Since we are in an industrial context, it is standard practice to connect the digital grounds of the boards and power supplies to earth. The suspicion that the problem is due to internal damage of the chip is supported by the fact that, on these faulty boards, replacing the KSZ8863 restores normal operation without any interruptions. 

HI,I am currently working on an Ethernet project using STM32F765IIT with the LwIP stack .I have configured the MAC and PHY (DP83848/DP83842) in MII mode, and link status is active.Now I want to verify Ethernet communication by implementing the ping (ICMP Echo Reply) functionality.Could anyone please share:Example code or reference project for STM32F765IIT + LwIP that handles ICMP Echo requests (ping)?Or guidance on how to properly configure LwIP for responding to ping commands?My setup:MCU: STM32F765IITInterface: MII (PHY: DP83842)Toolchain: STM32CubeIDECubeMX: Ethernet + LwIP (no RTOS)Any working example, configuration tips, or LwIP settings related to ping would be greatly appreciated.Thank you,Sreerag

 DescriptionCurrently, in the HAL USB driver, the PCD_HandleTypeDef structure embeds the setup packet buffer directly:uint32_t Setup[12]; /*!< Setup packet buffer */ This design tightly couples the control structure (state, locks, callbacks) with a DMA-dependent buffer. As a result:When USB OTG FS/HS DMA is enabled, the entire PCD_HandleTypeDef must be located in a DMA-accessible SRAM region.This prevents developers from keeping the handle itself in faster memory (e.g. DTCM) while only placing the setup buffer in SRAM.It reduces flexibility and forces a performance compromise.SuggestionThe setup buffer should be separated from the handle:PCD_HandleTypeDef should only store a pointer to the setup buffer.The actual buffer can then be allocated by the user in a proper memory region (DMA-accessible SRAM).For example:uint32_t *Setup; /*!< Pointer to setup packet buffer */ This would make memory placement more flexible:Developers can keep the handle in DTCM for fast CPU access.Onl

Possible Bug in HAL_SD_InitCard Hello wonderful STM community!I have identified a possible bug in the HAL Layer for the SDMMC peripheral. First time filing a bug report so please let me know if I miss anything import or if I'm completely wrongSystem InfoMCU: STM32H5Firmware Package: STM32Cube FW_H5 V1.5.0Board: CustomCubeIDE Version:  1.18.1Please ask if anything else should be included here! BackgroundFor a (u)SD to init it needs the clock speed to be slowed down to 400 kHz or lower, init commands and are then sent before the clock is then taken back up to speed. See this electrical engineering post for a good explanation and further reading.Symptoms uSD does not init correctly and does not return card info Cause In the file stm32h5xx_hal_sd.c (under HAL Drivers) and the function:HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd)There are two relevant lines:Line 494: Init.ClockDiv = sdmmc_clk / (2U * SD_INIT_FREQ);Line 519:sdmmc_clk = sdmm

At STM32G431 Is it possible to make a  (SPI daisy chain) shift register with one cyclic ringbuffer.With SPI peripheral as Full duplex Slave, with 2 DMA (RX TX) channels. "HAL_SPI_TransmitReceive_DMA(SPI_GetHandle(), ringbuffer, ringbuffer, SPI_size); "And stop DMA once NSS external pin interrupt accors ( rising edge). Or in other words read and write to same buffer in dma is that possible?I tested and it was working. Is this lucky or indeed possible, because SPI Transmit (read from buffer[x]) always happens before receiving (write in buffer[x]) from same index and therefore always guaranteed it works ? 

Hi, I am working on STM32G0c1RET6 board and i want to understand the working of low power timer (LPTIM) in stop mode.i am using the HAL_LPTIM_Counter_Start_IT(&hlptim1, 65534) to enable LPTIM1 and print a value in function   void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim) { if (hlptim->Instance == LPTIM1) {/* If instance called for HEATER DRIVER */ printf("1\r\n"); } }is it the correct way to print the value. because at some places i have seen usingHAL_LPTIM_TimeOut_Start_IT() function. which one is correct ??Edited to apply source code formatting - please see How to insert source code for future reference.

Is there an STMF4xx example project I can reference for using a virtual COM port to connect to FreeRTOS+CLI? I tried to do this myself by having the FreeRTOS+CLI function _write() call CDC_Transmit_FS() and by having CDC_Receive_FS() call a function that puts the received data into a circular queue, and then calls vTaskNotifyGiveFromISR() to tell the CommandConsoleTask that there is data in the queue for it to process.I see CDC_Transmit_FS() being called, but a breakpoint in CDC_TransmitCplt_FS() never fires, and no data appears in a Tera Term window connected to the serial port labeled as STMicroelectronics STLink Virtual COM Port (COM4). Likewise, typing into the Tera Term window does not result in a breakpoint in CDC_Receive_FS() ever getting hit.I'm sure I'm doing something fundamentally wrong, but what?

Title edited by a ST moderator to reflect the content. Hello, STM32CubeMX Version:6.15.0 STM32CubeH7 Firmware Package V1.12.0 / 30-October-2024 This Is My QSPI Configure in STM32CubeMX 1、When I Start QSPI Work in main function,The QSPI Will always work。QSPI work on CM4-Core。 source:   The QSPI CS signal wave，which Delta Time is 13us，not big than 1s according code： 2、When I Start QSPI Work in FreeRTOS Thread，The QSPI-CS signal Always High，and clock is always out 。QSPI work on CM4-Core。 source：   The CS Signal is always High, And clock signal is always output.The next is qspi-clock signal:   My Question is: 1、When I Start QSPI transmit-receive in main() function, It will always work, no stop. It's CS-signal always output low and high. Why? 2、When I Start QSPI transmit-receive in FreeRTOS thread, It does not work, CS-signal is always High, and clock is always output. I Have No Idea to solve it after many trial, Could You Have Some Idea?

Hello,I am trying to set up an external flash memory (MX25V1635F) on a Nucleo-U575ZI-Q.I have successfully used the low-level drivers (LLD) from the manufacturer Macronix and integrated them into the Levelx functions:UINT lx_stm32_nor_custom_driver_initialize(LX_NOR_FLASH *nor_flash) { UINT ret = LX_SUCCESS; ULONG total_blocks = 0; ULONG words_per_block = 0; /* USER CODE BEGIN Init_Section_0 */ total_blocks = 32; words_per_block = 16384; nor_flash->lx_nor_flash_base_address = 0; /* USER CODE END Init_Section_0 */ nor_flash->lx_nor_flash_total_blocks = total_blocks; nor_flash->lx_nor_flash_words_per_block = words_per_block; /* USER CODE BEGIN Init_Section_1 */ /* USER CODE END Init_Section_1 */ nor_flash->lx_nor_flash_driver_read = lx_nor_driver_read; nor_flash->lx_nor_flash_driver_write = lx_nor_driver_write; nor_flash->lx_nor_flash_driver_block_erase = lx_nor_driver_block_erase; nor_flash->lx_nor_flash_driver_block_erased_verify = lx_nor_

We're building a Wi-Fi gateway where the STM32U585 microcontroller communicates with a modem via both UART and SPI serial.As for the serial port, we've configured it as follows:void MX_USART1_UART_Init(void) { /* USER CODE BEGIN USART1_Init 0 */ /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; huart1.Init.BaudRate = 115200; huart1.Init.WordLength = UART_WORDLENGTH_8B; huart1.Init.StopBits = UART_STOPBITS_1; huart1.Init.Parity = UART_PARITY_NONE; huart1.Init.Mode = UART_MODE_TX_RX; huart1.Init.HwFlowCtl = UART_HWCONTROL_RTS_CTS; huart1.Init.OverSampling = UART_OVERSAMPLING_16; huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1; huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; if (HAL_UART_Init(&huart1) != HAL_OK) { Error_Handler(); } if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HA

Post edited by ST moderator to be inline with the community rules especially with the code sharing. In next time please use </> button to paste your code. Please read this post: How to insert source code Hi everyone, I’m trying to communicate with a Maxim DS2431 (1-Wire EEPROM) using an STM32F446RE MCU.I can successfully generate the reset and sometimes detect a presence pulse, but when I send the Read ROM (0x33) command, the data I receive is always 0x00 for all 8 bytes. I’m implementing the 1-Wire protocol manually (bit-banging) using a GPIO pin.Below are the hardware details and what I’ve tried so far. 🧱 Hardware setup MCU: STM32F446RE @ 180 MHz DS2431 powered at 3.3V (not parasitic) 1-Wire line connected to: GPIOA_PIN_0 Pull-up resistor: tried 2.2kΩ and 1.8   Is there anyone who has worked with DS2431 on STM32 before and can share experience, timing details, or working example code? Thanks in advance :folded_hands: Here is my 1-Wire read implementation: ``

I need to do long (100k+ samples) PSSI reception with GPDMA using linked list on STM32H7R3L8H6H. CubeMX version is v6.15.0 and CubeIDE is v1.19.0. Since single DMA request can't be that long, I am thinking of doing it with two circular linked-list nodes. There are no good examples (at least I didn't find) so I am trying to do with my own logic.The idea is to transfer data from PSSI peripheral to XSPI1 PSRAM with 8192 byte blocks. When one block finishes and second one starts, I increase the finished block destination address by 8192. Requests execute in circle.I setup GPDMA channel 12 for the linked list:And here is the linked list with two nodes N1 and N2 configured exactly the same (except name): Generated setup function in linked_list.cHAL_StatusTypeDef MX_PSSI_DMA_LL_Config(void) { HAL_StatusTypeDef ret = HAL_OK; /* DMA node configuration declaration */ DMA_NodeConfTypeDef pNodeConfig; /* Set node configuration ################################################*/ pNod

I cannot get smooth calibration to work in STM32l431. This is the code: void HW_RTC_Init(void) { LL_RTC_TimeTypeDef time; LL_RTC_DateTypeDef date; LL_RCC_LSI_Enable(); while(LL_RCC_LSI_IsReady() == 0) { } LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSI); __HAL_RCC_RTC_ENABLE(); LL_RTC_WaitForSynchro(RTC); //Set the default date to 2000-01-01 00:00:00:000 date.Year = 0; date.Day = 1; date.Month = 1; date.WeekDay = 6; time.Hours = 0; time.Minutes = 0; time.Seconds = 0; /* Configure RTC */ RTCHandle.Instance = RTC; /* Set the RTC time base to 1s */ /* Configure RTC prescaler and RTC data registers as follow: - Hour Format = Format 24 - Asynch Prediv = Value according to source clock - Synch Prediv = Value according to source clock - OutPut = Output Disable - OutPutPolarity = High Polarity - OutPutType = Open Drain */ RTCHandle.Init.HourFormat = RTC_HOURFORMAT_24; RTCHandle.Init.AsynchPrediv = 127; RTCHandle.Init.SynchPrediv = 255; RTCHandle.Init

Hi,Currently my STM32F767 is coming up in dual bank mode (I'm not sure why, since this does not seem to be the default) but I want to turn this off so I get the full 2Mbytes.However, I can see from AN4826 that if I turn off dual bank mode while the software is running, it's likely to crash because the flash width changes from 128 bit to 256 bit.I thought there would be a way to set the bank mode in CubeIDE, but I cannot find it anywhere. If I use CubeIDE to program an image into flash, then that seems to effectively limit me to dual bank mode and only 1Mbyte of flash.Can you advise me how I can turn off dual bank mode so that the image is programmed in by CubeIDE as a single-bank image?RegardsRobin Terry

STM32F407VET6 + STM32CubeIDE + CMSIS_OS2Latest IDE, w/ FreeRTOS 10.2.1, CMSIS-RTOS 2.00Touch LCD IRQ on PC_5.EXTI line[9:5] enabled, code gen enabled, and Call HAL Handler checked.Event defined. Fails with both dynamic and static Allocation.Include Param: xEventGroupSetBitFromISR enabled (doesn't work disabled either)I want to set a flag when the touch interrupt is triggered, then resume a handler thread waiting with osEventFlagsWait().Anyway, IRQ call succeeds.but (see comments) void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) {   if (GPIO_Pin == Touch_INT_Pin) { uint32_t flags = 0x00; extern osEventFlagsId_t touchEventHandle;   flags = osEventFlagsSet(touchEventHandle, 0x01); // ^ returns 0x01, as expected.   flags = osEventFlagsGet(touchEventHandle); // ^ returns 0x00, but should be 0x01     }   . . .   }debug tracing shows touchEventHandle points to the same heap location as FreeRTOS set up.Those Set/Get routines work fine within a thre

Post edited by ST moderator to be inline with the community rules especially with the code sharing. In next time please use </> button to paste your code. Please read this post: How to insert source code Issue:I'm using STM32H742, and I'm currently using timer3 (TIM3) to give a signal over CLK 50MHz to PC4 pins.However, when the code is written as follows, the period is not increasing beyond 680 kHz.The pin frequency speed is also set to VERY_HIGH. The system clock is set to 480 MHz, and the AHB and APB Timer CLOCK are also set to a maximum of 240 MHz.When you adjust the prescaler, period, and pulse values of the TimerIt has been confirmed that the period increases gradually up to prescaler = 0, period = 99, and pulse = 51, but as the period decreases gradually, the cycle change of PC4 is not large and the value decreases.In this case, prescaler = 0, period = 99, pulse = 51, one cycle of PC4 is 680 kHz.And when I toggle PC4 from the callback function, it doesn't come out as a cyc

  I am using STM32L476JE. I wish to use STL api to test 128kb of RAM as startup test for my device. I have come across some example codes but there seems to be confusion around the subsets.If possible can you share an example code snippet for the same.I have some doubts listed below:1. Which method will be efficient to test 128 kb (since memory is large), is it advisable to use  NumSectionsAtomic as 8 (which usually is kept 1 meaning 1 section (128 bytes) is tested at one go) 2. How exactly does STL_SCH_RunRamTM run?3. Which one is correct?   RamSubset.EndAddr = TEST_RAM_START_ADDR + RAM_NUMBER_OF_SECTIONS * RAM_SECTION_SIZE - 1; OR  RamSubset.EndAddr = TEST_RAM_START_ADDR + RAM_NUMBER_OF_SECTIONS * RAM_SECTION_SIZE;4. Which is the best way to test such large memory with STL?

File: stm32u0xx_hal_gpio.c/** * @brief Lock GPIO Pins configuration registers. * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR, * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH. * @note The configuration of the locked GPIO pins can no longer be modified * until the next reset. * @PAram GPIOx where x can be (A..F) to select the GPIO peripheral for STM32U0xx family * @PAram GPIO_Pin specifies the port bits to be locked. * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). * @retval None */ HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) {HAL_GPIO_LockPin() should return HAL_StatusTypeDef.But in Doxygen None 

Hello everyone, I need help with a DSI + LTDC configuration.I'm working on a custom board with an STM32H747BIT and trying to drive a 720x1280 RGB888 display without GRAM, using the ILI9881C controller via DSIHOST + LTDC.Here’s the situation:I’m currently testing at 500 Mbps per DSI lane (i.e., 62.5 MHz per lane, 2 lanes total) and 50 MHz LTDC pixel clock.The built-in test pattern works fine, but when I try to draw using the framebuffer, the image is misaligned, sometimes flickers, and the drawing coordinates are not correct.For example, when I try to draw two horizontal bands, the first one appears larger than expected.I suspect it’s related to timing parameters like HSA, HBP, HFP, VSA, VBP, VFP – but the datasheet for the display doesn't provide them.Observations and questions:To get the correct colors, I had to set ARGB8888 in LTDC, even though the display is RGB888.Without the missing timing values, I can’t estimate the frame rate or configure DSI properly — I’m stuck.Is there a rel