STM32 MCUs

Hello,I have managed to lock a couple of Nucleo H503 boards and, while they are not very expensive, I would like to try and understand the problem so we can avoid it on production boards.Although I have been experimenting with setting security options (to provisioning and closed, with a password), I don't think the problem is with security as the programmer Discovery mode is unable to even detect the device.My code checks the security setting and changes it if not closed, so would normally only run on the first pass.First, it checks if the password data is in the OTP memory and if not, writes it and locks the block. Since reading unwritten OTP memory causes a bus fault, I use the block lock bit setting as an indication that the OTP has been written.I then compare the OTP data with the expected values and, if correct, set the state to Provisioning then Closed.I have stumbled across a few things that seem to help or cause problems during this process:The password data is 32 bytes but I p

I have changed the ThreadX system timebase on an STM32H7 from 10 ms to 1 ms (i.e., the RTOS tick is now 1 ms). The application is quite large and makes extensive use of ThreadX services such as thread delays, semaphores, mutexes, event flags, and timeouts in various system calls, all of which are specified in ticks. With this change, the real-time duration of existing delays and timeouts is effectively reduced (for example, a delay that was previously 1 second now becomes 100 ms), so I would like to understand whether these values need to be scaled accordingly or refactored using time-based conversion macros to preserve behavior. In addition, the system uses NetX Duo, which runs on top of ThreadX, and I would like to confirm whether NetX Duo fully depends on the same ThreadX tick and whether changing the tick period to 1 ms has implications for network timing, such as TCP timeouts, retransmissions, or protocol timers. Finally, I am interested in best practices and potential risks, such

Hi,I am using STM32G070RB for a modbus based product. The code is complete but i am facing issues that on some of the controller the code does not work and it gets stuck in the HAL_DELAY() function because the systick interrupt are not getting through.Strange and concerning thing is that the code works on many controllers without problem but on few of them random controllers we are facing this issue.I have tried setting the nBOOT_SEL, nBOOT1 and nBOOT0 in the code so that the vector table address get set correctly.void ConfigureBootToUserFlash(void) { // Unlock the Flash memory control register if (HAL_FLASH_Unlock() == HAL_OK) { // Unlock the Option Bytes if (HAL_FLASH_OB_Unlock() == HAL_OK) { FLASH_OBProgramInitTypeDef obInit = {0}; // Read current option bytes HAL_FLASHEx_OBGetConfig(&obInit); // Check if nBOOT_SEL and nBOOT0 are already configured if (!(obInit.USERConfig & FLASH_OPTR_nBOOT_SEL) || // nBOOT_SEL not set (obInit.USERConfig & FLASH_OPTR_nBOOT0

hello everyone, i am a beginner in STM32cube. i was working on board Nucleo wb55rg. and following this tutorial STM32WB Getting Started Series: Part 12a, STM32CubeMX & STM32CubeIDE lab. Introduction, and it said on 2:33 that i need to activate "system core>IPCC and enable both interrupt". i am using STM32CubeIDE 1.5.0 and it does not show IPCC option on it .   any help and guidance is appreciated, thank you

I am currently developing CSI using the STM32N6. I would like to study the project at the following link: https://github.com/STMicroelectronics/STM32N6-GettingStarted-ObjectDetection/blob/main/Middlewares/stm32-mw-camera/Release_Notes.mdHowever, the release notes state "Support for the STM32N6570-DK board only." Does this mean it is impossible to develop this project or related CSI projects on the NUCLEO-N657X0-Q?please help me

Hi all, I am trying to bring up a new custom board with an STM32H7R7 and external flash as well as external PSRAM. While I managed to get the external flash working after some try and error, the external PSRAM seems to be more stubborn. The board uses a IS66WVO8M8DALL-200BLI from ISSI (https://www.issi.com/WW/pdf/66-67WVO8M8DALL-BLL.pdf)  The PSRAM is connected to XSPI1 in OctoSPI mode. The XSPI clock is configured to 133MHz. At the moment the MPU is completely disabled to not having to debug several things at once.  The MX_XSPI1_Init() currently looks like this: static void MX_XSPI1_Init(void) { /* USER CODE BEGIN XSPI1_Init 0 */ /* USER CODE END XSPI1_Init 0 */ XSPIM_CfgTypeDef sXspiManagerCfg = {0}; /* USER CODE BEGIN XSPI1_Init 1 */ /* USER CODE END XSPI1_Init 1 */ /* XSPI1 parameter configuration*/ hxspi1.Instance = XSPI1; hxspi1.Init.FifoThresholdByte = 2; hxspi1.Init.MemoryMode = HAL_XSPI_SINGLE_MEM; hxspi1.Init.MemoryType = HAL_XSPI_MEMTYPE_MACRO

Heyho,I'm currently designing a new modular system, with an STMH7 on the base-card. That one's basically up and running, including a self-made bootloader.Now I'm working on some new modules, these will be connected to the "base H7", probably via I2C, 2 extra UART lines might also be possible.The previous system used ATmega-MCUs on the modules, now we'll surely use some STM32 type. These modules will not do any DSP or computing, so a "small" STM32 will do (tending towards L07x because of the EEPROM).To save some dev time I'm thinking about using the internal bootloader for the module MCU, controlled by the base H7.I have checked the application notes (AN2606 and the ANs depending on the BL interface), also found the example source code from ST on Github.So far that looks okay and doable, nevertheless user experience always wins over "reading". :DSo...Anybody using the ST bootloaders in some real-life products ?How did that go and work out ? Documentation and source code examples good en

HiIf I develop an application using the STM32WBA25 MCU with BLE, ThreadX, and USBX, is the RAM size sufficient?

Hello Team,We are planning to use MCU P/N: STM32N657X0H3Q for our new design. We want to perform thermal simulation. Could you please help us for how to calculate power dissipation?Thanks.

Hi everyone, I am working on a Beacon project using NUCLEO-WB05KN. My goal is to broadcast Eddystone-UID and allow a connected phone to update the Namespace ID and Instance ID via GATT characteristics. The Setup: I have a Custom Service with two characteristics: Namespace (10 bytes) and Instance (6 bytes). The device broadcasts Eddystone-UID correctly in connectable mode. I’ve added the GATT_NOTIFY_ATTRIBUTE_WRITE (0x01) mask to both characteristics. I’m using hci_init(hci_user_evt_proc, NULL); for event handling. The Problem: When I write a value from the nRF Connect app, the write is successful on the phone side, but the aci_gatt_srv_attribute_modified_event callback is never triggered on the MCU side. I have disabled EnterStopMode() to ensure the MCU stays awake. I have tried implementing the callback in both app_stm32wb05n.c and stm32wb05n_events_cb.c (overriding the WEAK function), but still no luck. My Device_Init Code: C   /* Namespace Characteristic *

Hello,I am implementing a USB Audio Class 1.0 microphone on an STM32 (Full-Speed only).The device enumerates correctly on Windows and appears as a 4-channel microphone in the Sound Control Panel, but no WASAPI-based application can open the input stream.When using Audacity with WASAPI, the device exposes only 1–2 input channels and recording cannot be started.For USB Audio Class 1.0 Full-Speed microphones on Windows, I have the following questions:Are Sampling Frequency Control requests (GET_CUR / SET_CUR) required even if the device supports only a fixed sample rate of 48 kHz?Is the presence of a Master Feature Unit (Volume and/or Mute control) required for Windows/WASAPI to successfully open the audio stream?Are there any mandatory class-specific control requests that must be implemented (i.e. must not be STALLed) to avoid WASAPI stream open failures?Setup:STM32 USB Device (FS)UAC 1.0, Isochronous IN (microphone)PCM, 48 kHz, 16 bit, 4 channelsIso IN Endpoint: AdaptiveWindows 11 

Heyho,I think I need some more info about the internal bootloader ("BL") which I didn't find in AN2606 or AN3155 (UART). a) Are all BL interfaces active / scanned at the same time, and any interface finding any change in level will be "chosen"?From what I have found, it is crucial to keep unused IOs "quiet". b) Does the BL have some "start-up timeout", meaning that it will stop scanning the IOs, and / or jump to the application? Thanks in advance!

Hello,I need to sync the stm32n6 system timer to be used as PTP master. According to the Reference Manual there is a PPS input that can generate timestamp and interrupt: ETH_PTP_AUX_TSBut according to the RM it is not in all models, and I can't find which models it exists and how to map it to external IO. Thanks,Noam. 

Hello everyone,I need to drive up to 11 LPS27HHTW pressure/temperature sensors using an STM32C5 microcontroller. Currently, I'm testing the setup on an NUCLEO-C562RE board with multiple STEVAL-MKI220V1 modules.At first glance, using I3C dynamic addressing seemed to solve the bus conflict issue. However, while testing, I realized that all of these sensors share the exact same 48-bit PID (0x020800B30000). This generates a collision when doing an ENTDAA broadcast.Since the sensors only have 2 possible static I2C addresses (0x5c and 0x5d, depending on the SA0 pin level), I cannot use the SETDASA command for all 11 devices either.I can't split the sensors across different buses since there are too many of them. I would like to know if there are better architectural options than playing with the CS pin levels using 11 dedicated GPIOs to enable/disable communication on each sensor individually.Any advice on how you would drive that many sensor using a STM32C5 mcu?Best regards,Mathias

Hi,I have the STM32H753ZI Nucleo board and have developed firmware around this MCU with this board as my reference platform.On our product, firmware updates will be uploaded via the UART interfaces.So the user will need to enter Bootloader.On the Nucleo board, the LD3 Red LED stays illuminated when in Bootloader.I think this is because the GPIO pin is being pulled up, and this is not intentional as an indicator?An indication to the user that they have successfully reset the MCU into Bootloader is useful.How can you recommend we can do this in a reliable way in the future?Thanks.

Hello, I am currently using the STM32WBA65RI development kit and exploring its low-power modes. I have run the STOP2 mode example and, according to the datasheet, the current consumption in this mode should be around 5 µA. However, I am measuring the current using an external power supply with measurement capabilities (SMU), powering the board through JP2 pin 1 as specified in the user manual. In this setup, I observe a current consumption of approximately 300 µA while in sleep. Could you help me understand why there is such a large discrepancy? What steps are required to achieve the ~5 µA consumption stated in the datasheet? I also have a few additional questions regarding this mode. In the example, the functionHAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON, PWR_STOPENTRY_WFI) is used, but it is not clear where STOP2 mode is explicitly selected. According to the official documentation, there are also STOP0 and STOP1 modes, which adds to my confusion. Additionally, I have seen examples whe

Hi,We are working for a project on Railway application, where we have selected STM32G4A1VET6 controller for Motor control application.we are developing custom board for Motor control application, Selected motor is BG65x50 dCore by Dunker motor,above selected controller is not available in MC workbench software. Could you please provide solution on this one and also the motor control library package is not available in STM32CUBE IDE middleware section.

Hello, I'm using 2x NUCLEO-WB55RG boards with the unmodified BLE_MeshLightingPRFNode example from STM32CubeWB V1.24.0. Setup:- BLE Stack full v1.13.2.2 (stm32wb5x_BLE_Stack_full_fw.bin)- FUS v1.2.0- Provisioned with ST BLE Mesh app (tested on both iOS and Android)- Both nodes subscribed and published to Default group (0xC000)- Both nodes have AppKey 00 bound to all models Firmware boot logs confirm:- Relay = Enabled- Proxy = Enabled- Friend = Enabled- PB-ADV = Enabled- PB-GATT = Enabled- Default TTL = 8- Different MAC addresses on each board Problem:1. Sending a Generic OnOff command to the Default group (0xC000) from the app only turns on the LED of the node connected via GATT proxy. The other node never receives the message. 2. SW1 button press toggles only the local LED, never the remote node's LED. 3. It is ALWAYS the last provisioned node that responds. If I reverse the provisioning order, it is still the last one that works. The first provisioned nod

Hello everyone,I was reviewing the AN4899 Application Note and noticed a potential logic inconsistency that might lead to misunderstanding the GPIO output stage. I have prepared a short analysis and a proposed correction below. I would appreciate it if the technical team could take a look. IntroductionThis report investigates a potential logic inconsistency identified in the STMicroelectronics AN4899 Application Note. The analysis suggests that the logic gates in Figures 15, 16and 17 might be drawn incorrectly, specifically the part controlling the P-MOS transistor. Due to the structural similarities between these figures, the analysis is explained based on Figure 17.Signal Mapping and Logic AnalysisThe following diagram (Figure 1) has been labeled with signal names to track the logic flow from the digital output to the transistor gates:Figure 1Figure 1: Labeled Figure 17 from STMicroelectronics AN4899 Application Note. Red arrows and signal labels (SIGN1-SIGN6) have been added fo

Hello,I am interested in the optional decryption sequence part of secure boot on STM32N6 mcu. As described in UM3234 (How to proceed with boot ROM on STM32N6 MCUs) a key derivation function is used to produce an encryption key. However I am not sure how the Enc/Dec Master Key is produced, as in the OTP mapping table (RM0486: STM32N6 Reference Manual) only an EDMK derivation constant is present. Am I correct to assume that this OTP168 word is used to derive the EDMK out of OEM secret (OTP 364-367)? If so, what's the algorithm? Additionally, what's the derivation constant used in ROM that's mentioned in the diagram? Is it publicly available?Thanks,kradzphsys

Hi, What is the official moisture sensitivity level (MSL) for STM32F072CBT6TR? I found conflicting information showing both MSL 2 and MSL 3.

Hello community,I have this problem. I have a project with the STM32U575RGTx microcontroller.It includes also FreeRTOS (Version 1.3.1) and a TouchGFX project (Version 4.26.0).With this system configuration: Timebase Source TIM17 The TouchGFX project has screens that require more or less CPU, the problem that I have is that when one or other screen is selected the execution frequency of the FreeRTOS tasks and the HAL_TIM_PeriodElapsedCallback change their execution frequency, so I can not have a valid time reference to do other things in my firmware application. Has anyone faced the same problem? Much thanks in advance!  

Hello,I am working with STM32WB05KN in beacon mode (non-connectable advertising, legacy advertising).I am configuring advertising manually using:aci_gap_set_advertising_configuration()aci_gap_set_advertising_data_nwk()aci_gap_set_advertising_enable()My advertising data contains only:Flags (0x01)Manufacturer specific data (iBeacon format)  aci_gap_init(PRIVACY_DISABLED, HCI_ADDR_PUBLIC); : : uint8_t adv_data[] = { /* Advertising data: Flags AD Type */ 0x02, 0x01, 0x06, /* Advertising data: manufacturer specific data */ 26, /* len */ AD_TYPE_MANUFACTURER_SPECIFIC_DATA, /* manufacturer type */ 0x30, 0x00, /* Company identifier code (Default is 0x0030 - STMicroelectronics: To be customized for specific identifier) */ 0x02, /* ID */ 0x15, /* Length of the remaining payload */ 0xE2, 0x0A, 0x39, 0xF4, 0x73, 0xF5, 0x4B, 0xC4, /* Location UUID */ 0xA1, 0x2F, 0x17, 0xD1, 0xAD, 0x07, 0xA9, 0x61, 0x00, 0x00, /* Major number */ 0x00, 0x00, /* Minor number */ 0xC8 /* 2's compleme

 Hello ST Community,I’m currently trying to select the right MCU/board from the STM32H7 series, but I’m a bit confused between the following options:STM32H723STM32H725STM32H735STM32H7A3VGT6My requirements:Need CORDIC support for fast math operationsRequire high-precision calculations (double precision floating point)Planning to implement a high-performance data processing pipeline (DPU-like workload)Would prefer a board with good STM32CubeH7 example supportMy confusion:Do all the above MCUs support CORDIC, or only specific variants?Is double precision (64-bit floating point) actually supported in hardware on these devices, or only single precision (FPU)?Which of these would be the best fit for heavy math/DSP workloads?Are there recommended Nucleo/Discovery/Eval boards for these MCUs that already have:Working examples (DSP / math / AI)Good documentation and community supportWhat I’m trying to avoid:I don’t want to choose a device and later realize:It doesn’t support CORDICOr double

Hi, I'm working on the STM32H750B-DK discovery board and need to combine two key functionalities:1. Ethernet connectivity based on the LwIP stack (using the example from the `stm32-hotspot/STM32H7-LwIP-Examples` repository).2. A TouchGFX GUI that stores its assets (images, fonts) in the external QSPI flash (`MT25TL01G`) due to the limited internal flash (128KB).I have both components working **individually**: - The **standalone Ethernet example** (STM32H750_Disco_ETH) works perfectly – I can ping the board at `192.168.1.10`.- The **standalone TouchGFX application** works when the external flash is properly initialized via a bootloader, and assets are loaded from `0x90200000`.The challenge is to merge them into a single project where the application code runs from internal flash (the `APP_FLASH` region) and the Ethernet stack functions correctly alongside the TouchGFX GUI. ### **Current Memory Map (Linker Script)** I am using the following memory partition to accommodate both: `MEMORY {