STM32 MCUs

What should be the color input format for hal_dma2d_start()?According to the function definition, it seems that only ARGB8888 format colors can be inputted.static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height) { uint32_t tmp; uint32_t tmp1; uint32_t tmp2; uint32_t tmp3; uint32_t tmp4; /* Configure DMA2D data size */ MODIFY_REG(hdma2d->Instance->NLR, (DMA2D_NLR_NL | DMA2D_NLR_PL), (Height | (Width << DMA2D_NLR_PL_Pos))); /* Configure DMA2D destination address */ WRITE_REG(hdma2d->Instance->OMAR, DstAddress); /* Register to memory DMA2D mode selected */ if (hdma2d->Init.Mode == DMA2D_R2M) { tmp1 = pdata & DMA2D_OCOLR_ALPHA_1; tmp2 = pdata & DMA2D_OCOLR_RED_1; tmp3 = pdata & DMA2D_OCOLR_GREEN_1; tmp4 = pdata & DMA2D_OCOLR_BLUE_1; /* Prepare the value to be written to the OCOLR register according to the color mode */ if (hdma2d->Init.ColorMode == DMA2D_OUT

I am using the following tool versions:MC Workbench: v5.4.8STM32 Firmware Package: v1.11.3STM32CubeMX: v6.2.0Here are the steps I follow:Open the ElectronicSpeedControl.stmcx file in STM32 Motor Control Workbench and save it to a new, empty location.Go to Tool → Generation. In the dialog window that opens:Select STM32CubeMX v5.2.0 or laterChoose STM32CubeIDE as the target toolchainSelect STM32 FW V1.11.3 or later for the firmware packageEnsure the HAL (Hardware Abstraction Layer) option is selected for Drive TypeClick UPDATE to proceedThis starts the code generation process.Then click RUN STM32CubeMX to open the .ioc file in STM32CubeMX.Once opened, click Generate Code (top right corner).Open the generated project in the target IDE (STM32CubeIDE).Build the project and flash the resulting .bin file to the MCU using STM32CubeProgrammer and ST-Link V2.After flashing, the motor starts beeping and runs smoothly when PWM signals are applied. However, once the board (STEVAL-ESC001V1) is resta

Hi all,I'm trying to find out if any STM32 MCUs support hardware input qualification on GPIOs, similar to what's available on TI C2000 MCUs.On the C2000 series, GPIOs can be configured for input qualification using a sampling window—typically 3 or 6 samples spaced apart based on the system clock. Here's a reference from the C2000 TRM for clarity (see attached images):Sampling is done every 2 × QUALPRD × T_SYSCLKOUTThe input must be stable for multiple consecutive samples before it's considered validThis helps filter out glitches or noise on input lines without software debounceI'd like to know:Do any STM32 series (F0/F1/F4/G4/H7, etc.) provide similar hardware input qualification or multi-sample filtering at the GPIO input level?If not at the GPIO level, do any EXTI lines or timer input capture channels offer configurable digital filtering that could replicate this functionality?Are there STM32 families with 'majority-vote' digital filters like what some comparators or HRTIM inputs pro

Hello,I am using the EVLSERVO1 board with a differential quadrature encoder (A and B phases). The encoder has a resolution of 4096 pulses per revolution, and I am observing issues when the motor speed exceeds a few hundred RPM.Specifically, the system becomes unstable above ~500 RPM. The motor fails to spin reliably, and the encoder appears to stop providing meaningful feedback(past 500 rpm, the encoder value stays the same about). However, when I probe the differential signal (A+ minus A−), the waveform looks clean on the scope.Is this behavior expected due to the encoder being considered "high resolution"? Would performing the rework suggested for high-resolution encoders (replacing R81 and R82 with 330 Ω...) help resolve this issue?I am unsure where the resolution or frequency cutoff is that necessitates this rework, and would appreciate any guidance.Thank you!

Hi, I have configured my STM32H563AI CubeMX-project to use "JTAG with Trace  Synchro(4bits)" and assigned the corresponding pins. Also, I explicitly activated the corresponding registers in DBGMCU and DCB by adding: SET_BIT(DBGMCU->CR, DBGMCU_CR_TRACE_IOEN); SET_BIT(DBGMCU->CR, DBGMCU_CR_TRACE_CLKEN); SET_BIT(DCB->DEMCR, DCB_DEMCR_TRCENA_Msk);to MX_GPIO_Init. However, when I try to trace using Ozone V3.38g I always get a "No trace clock present, trace may not work correctly."-warning and nothing is read out from the instruction cache. My trace settings in Ozone are: Trace Source: Trace PinsCPU Frequency: 250 MHzTrace Port width: 4 bitMaximum Instruction Count: 100M I used an oscilloscope to look at the TRACECK-signal but found nothing there, it only ever has 0V. Also, I verified my tracing setup, using a SEGGER Cortex M-Trace Reference Board and with this it was just working fine. Also, I verified, that the corresponding registers

Good afternoon,I'm using the STM32H723ZG Nucleo Board, and I'm trying to collect data using I2S + DMA coming from a PCM1803AEVM that is  a 24-bit ADC used mostly for audio purposes.I've set the PCM1803 as controller (MASTER), it is generating the BCK, LRCK and SDO and I can see these three signals using the oscilloscope. I see also the correct frequencies.BCK:3.072MHzLRCK: 48kHzSDO: digital values equal to -1,0.+1 as expected since there is no input signal.Now, from the STM32 board  I've set the .ioc file related to the I2S part in this way:DMA:The main code is the following, very simple: #define BUFFER_SIZE 100uint32_t samples[BUFFER_SIZE] = {0};int main(void){ /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /* MPU Configuration--------------------------------------------------------*/MPU_Config(); /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Sys

I am using STM32G030 for my project when using version Z (REV_ID 0x1001) the functions in the firmware run as required. But when using the same firmware, the above hardware loads version Y (REV_ID 0x1003) the functions run incorrectly, especially the timing functions using RTOS. Has anyone ever encountered a similar case and has a solution as well as knows the cause of this error? Thanks

What is the process to use the ADC on STM32L152rct6 to wake up the micro from Sleep?

Hi everyone, I was wondering if is it valid to allocate DMA buffers for USART/SPI etc.. on the heap using aligned_alloc() function?My board is the NUCLEO-H743ZI2  If its possible - is it good practice?Thanks, Ariel

I have some code on the STM32G030 processor using only LL drivers.I need to write on some area in the flash of the processor.I undestood that there is no LL driver for Flash, but the proble is that If I try to use some HAL functions, like HAL_FLASH_Unlock I get that the linker does not find it.So the question is how can I add HAL Flash support (.h and .c) in a project that have only LL drivers?Thank you.Regards.Mau. 

I'm currently working on a project using the IHM16M1 expansion board, and I would like to know the steps required to initialize the STSPIN830 motor driver

Hi,I have generated code for HSO on a workbench as recommended by the release note. But we are thinking of using the STM32F4 or STM32F7 series of controllers. So, my question is: Does the HSO algorithm work for dual-channel FOC on the STM32F4 or STM32F7 boards if we port the code? HSO is not for the STM32F4 Series. Is it due to peripheral limitations or not introduced? Thanks,Rahul D

Hello everyone,I am currently using ST Motor Control Workbench v6.4.0 along with STM32CubeMX v6.14.1 installed on my Windows PC. Although STM32CubeMX is correctly installed and working independently, when I click "Generate Code" in the Motor Control Workbench, the program fails to detect STM32CubeMX. It shows the message:“STM32CubeMX not found – ver. '6.0.0' or higher is required.”With that, I am not able to detect "Target Toolchain" and "Firmware Package Version" on Motor Control Workbench 6.4.0I would be grateful if you could assist or provide confirmation regarding this workaround or a more official solution in case of future updates.

Hi everyone,I'm using TouchGFX on a STM32U5G9 microcontroller and got stuck while trying to enable GPU2D (aka NeoChrom).The starting and working configuration is TouchGFX + LTDC + DMA2D. Everything works properly: the signalVSync function of the OSWrappers is called periodically due to LTDC interrupts and so the counterpart waitForVSync.As soon as I enable the GPU2D acceleration from CubeMX (following the guide here https://support.touchgfx.com/docs/development/touchgfx-hal-development/generator-how-to/touchgfx-al-configuration/driver), the screen remains black despite the signalVSync function is actually called. On the other hand the waitForVSync function is called 2 or 3 times and then no more.Does anyone have an idea of what's happening? What am I doing wrong?Thank you for your help.

Hey everyone,I'm currently working with the STM32H7S78-DK.I'm trying to set up an external memory loader project, executing code from external memory with XIP, while also partitioning out the SDRAM in a few different addressable chunks in the memory layout tool.But, it seems when I set this up in CubeMX, I'm not able to configure the project in a way where I can partition out the SDRAM by address in the memory configuration page, and also use the external memory loader.This is based off of attempts to modify the XIP template IOC file.What's the best way to configure this? Or is it possible with the external memory manager?Also, if there are resources to help deepen my admittedly shallow understanding of the External memory loader / manager middleware, and bootloader system for the STM32H7? I've found this tutorial:https://wiki.st.com/stm32mcu/wiki/Getting_started_with_External_memory_Manager_and_External_memory_loaderBut I'd love a more datasheet style document to outline all the memor

I'm using a STM32WL33 on 2 separate custom PCBs.  I have one of them being a transmitter only, and I have verified that the transmitter consistently transmits when the keyfob button(s) are pressed (using one of the examples on a Nucleo CC2 board to verify) I'm having issues with the receiver ceasing to recover after receiving a low-RSSI signal.  As long as the signal strength is reasonable, the HAL_MRSubG_IRQ_Callback executes, and resumes reception without issue.  If it receives a packet that is of questionable RSSI (either too far away with the keyfob or wrapping the keyfob in aluminum foil to keep my step count down :)   ), the HAL_MRSubG_IRQ_Callback doesn't execute at all once the RSSI is back to the original level, and requires a power cycle to recover.  The main loop continues to operate, it's just that the interrupt ceases to fire!  I have observed the same thing on the Nucleo CC2 PCB as well using the Chat example.  A rebo

Hello, I'm running into an issue interfacing the STM32H7R3V8H6 with a MAX31856 where whenever I try to use any sort of SPI functionality, it returns HAL_Error. This issue surprises me because the code that I am using is identical to the code I used on another H7 chip and that worked. Things I have tried:1. Lowering the SPI clock speed.2. Ensuring that the SPI and CS pins were set up correctly (CS pin was set to digital output and the GPIO was configured for the application not the boot. Same for the SPI pins.)3. Changing the SPI GPIO pin speed to very fast.4. Probing the signals with an oscilloscope (I couldn't get very good results since I'm probing the pins on a custom board, but I was able to verify that SCK was working, but I couldn't determine if MISO or MOSI was functional)5. Switching SPI from SPI1 to SPI3.For reference I am using SPI1/3 on pins PB3, PB4, and PB5.  #include "main.h" /* Private includes --------------------------------------------------------

Hello ST Community,I’m currently working on integrating the MX25QL128 NOR Flash (connected over QSPI) with the STM32F746 microcontroller. My goal is to use it with Azure RTOS FileX and LevelX for filesystem access. I’m using STM32CubeIDE and the latest version of Azure RTOS.Setup:MCU: STM32F746NGExternal Flash: MX25QL128 via QSPIMiddleware: Azure RTOS (ThreadX, FileX, LevelX)Interface: QSPI in Memory-Mapped ModeGoal: Format, mount, and use FileX filesystem stored on MX25QL128Request:I’m looking for:Sample code/project showing working integration of FileX + LevelX + MX25QL128 via QSPI on STM32Any ST reference projects or application notes specific to this setupClarification on required QSPI mode/timing/memory map settingsCommon pitfalls (e.g., erase before format, QSPI memory-mapped setup timing, etc.)Any working FileX + LevelX configuration example (even with another STM32 MCU) that could help me align my integration. Any working example or advice would be very helpful. Thanks in

Goal: to use embedded STM32H673/563 bootloader commands: read, write, verify flash with simple GUI on PC side. Do you have full algorithm description/implementation/full code example? 

I'm developing a project with the dual-core STM32h755zi-q, but when I run the m4 core while debugging, I encounter the error, "Break at address "0xa05f0000" with no debug information available, or outside of program code." I've configured the debugging settings according to the documentation and video shared by ST. I'm currently working on the m4 core, and I'll switch to the m7 core later, but I'm not making any progress due to the error I mentioned above.I would like to express my gratitude to everyone who helped.

I’m using the NUCLEO-N657X0-Q board and I'm creating a custom NN project using lwIP (that has the necessary weights stored at 0x7100 0000 - external Flash) and I'm trying to make it run when booting from Flash.I am currently using the “Template_FSBL_LRUN” example from STM32Cube_FW_N6_V1.2.0 as my first-stage bootloader. The FSBL correctly copies my main application from external Flash (mapped at 0x7010 0000) into internal RAM and then jumps to it. But then I noticed my app crashed when including parts of the code related to lwIP or the NN and after reading some XSPI2 registers I saw that the SR register had a value of 0x 0000 3C20 when entering my application which means the XSPI2 is already busy and its FIFO is full, so every fetch hangs.When trying to debug to see when the XSPI2 gets busy I noticed it was after this line in stm32_boot_lrun.c:source = (uint8_t*)(MapAddress + EXTMEM_LRUN_SOURCE_ADDRESS);Also when running the application straight from the STM32CubeIDE I noticed that the

Greetings! I am testing a touch button in a custom board using stm32u585 mcu. I try to follow the following workshops available on YouTube: Workshop 1 Workshop 2 The thing is, I tested in Debug Mode like in Workshop 1 in minute 15 and I could see the Delta value changing. Since the thing was working I try to implement the touch in my project. The thing is, now Delta is staying fixed, and I have absolutely no idea why it is happening. I can see the p_Data->StateId changing (PROX, DETECT, etc) but Delta value is the same. Any clue where I could be having the problem? I did not do the "MyTKeys[0].p_ChD->Delta /= 3;" in tsl_user.c, nor in the first test, and it worked at the first time.So basically my code in main.c was something like this:  #include "tsl.h" #include "touchsensing.h" ... int main(void) { "ALL THE INITS" tsl_user_Init(); tsl_user_status_t status; while(1) { tsl_status = tsl_user_Exec(); if(tsl_status != TSL_USER_ST

Hi all, SynopsisI have just found a severe error in FileX that looks like buffer overrun in fx_file_read(), but the problem is much deeper. This function leads to the function sd_read_data() which when invoked with use_scratch_buffer = 0 reads sectors to a user buffer directly. Unfortunately caller of the sd_read_data() (function fx_stm32_sd_driver()) checks buffer alignment for 4 only despite if project uses data cache or not. What happens next is very simple: sd_read_data() invalidates the cache for the entire buffer. If it is not aligned to cache line size then some bytes around it are also invalidated. If these bytes were dirty in cache they are lost. If the user buffer is allocated in the heap it hopelessly corrupts it.  Workarounds In the function fx_stm32_sd_read_blocks(), in /*USER CODE*/ section BEFORE the call to HAL_SD_ReadBlocks_DMA(), add the following code:clean_cache_by_addr(buffer, 1);clean_cache_by_addr((((char*)buffer) + hs

Hello,I'm working with STM32H745ZITX on a dual-core setup. I configured USART3 on the CM7 core. The communication flow is:TX: Using HAL_UART_Transmit (polling)RX: Using HAL_UART_Receive_ITThe first message reception works correctly. The HAL_UART_RxCpltCallback function is triggered as expected — however, the received data buffer remains empty (i.e. I can't read the data).On subsequent transmissions, no interrupt is triggered, and the RX remains in HAL_BUSY state. As a result, no new data is received, even though I can see the incoming data on the RX pin via an oscilloscope.I verified:USART3_IRQHandler is implemented and calls HAL_UART_IRQHandler(&huart3)Only the CM7 core handles UART3; CM4 does not touch itHAL_UART_Receive_IT returns HAL_BUSY after the first useQuestion: Is there any dual-core-specific configuration I need to apply to use UART interrupts reliably on CM7?Could D-Cache or I-Cache being enabled affect UART RX interrupts even when not using DMA?If yes, what is the

Hi, I managed to enable TrustZone by setting the TZEN-bit to 1 like soSTM32_Programmer_CLI -c port=SWD -ob TZEN=1But I can't seem to manage to turn it off the same way. I've tried doing it from the graphical interface as well, with the same results. Do I have to do anything special on this board to set TZEN to 0?Here are my complete set of option bytes. I've only changed TZEN=1 myself.STM32_Programmer_CLI -c port=SWD -ob displ ------------------------------------------------------------------- STM32CubeProgrammer v2.20.0 ------------------------------------------------------------------- ST-LINK SN : 066BFF505048878667122712 ST-LINK FW : V2J45M31 Board : NUCLEO-L552ZE-Q Voltage : 3,26V SWD freq : 4000 KHz Connect mode: Normal Reset mode : Software reset Device ID : 0x472 Revision ID : Rev Z Device name : STM32L5xx Flash size : 512 KBytes (default) Device type : MCU Device CPU : Cortex-M33 BL Version : -- UPLOADING OPTION BYTES DATA ... Bank : 0x00 Address : 0x50022040 Size :