STM32 MCUs

This should be a simple use case but to my surprise it does not seems obvious how to do it. Say I have 3 PWM channels in the same timer, how do I turn them on simultaneously?If I do   if (HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_1) != HAL_OK) Error_Handler();  if (HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_2) != HAL_OK) Error_Handler();There could be delay between the two steps. Is there a model where I can1) Enable PWM CH1, 2) Enable PWM CH2, 3) start timer What is the proper way to achieve this? 

I'm seeing TouchGFX has been updated to 4.26.0 https://support.touchgfx.com/docs/miscellaneous/changelogUnfortunately, after having launched it, no pop-up appears asking for update https://support.touchgfx.com/docs/miscellaneous/updating-to-a-new-touchgfx-versionI'm noticing even on ST Download page isn't updated https://www.st.com/en/development-tools/touchgfxdesigner.html

hi ；During the operation of STM32H723VGT6, the constant input bus error and hardware error interrupt occurred, and the clock is 280M. The PWR_REGULATOR_VOLTAGE_SCALE1 is unstable. The clock configuration __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0) was modified. The result is stable. Could you please help confirm what the reason is

Hello,I am trying to get f_mount() to work with the SDIO peripheral. Currently, the f_mount() reaches the first disk_read() function, where it hangs in the osMessageQueueGet() call.  Stuff I already tried:- increase min & max heap to 0x400, 0x800- increase default static rtos task stack size to 8000- call f_mount in the default task- have delay before f_mount- pullup on all IO pins except the CLK- the hsd.Instance has recognized card type and class- the NVIC prio is 5 for SDIO and DMA stream- tried SDIO_RX/SDIO_TX combo and just SDIO- tried setting GPIO pins to lower speeds- tried SD bit 1 mode and then switching to 4bit mode- tried SD bit 1 mode and keeping 1 bit mode- SDIO_IRQ interrupt hits, but does not put anything in the SDQueueID queue. i would prefer to use the cubemx generated drivers and not write one myself. is this configuration (RTOS+SDIO+FATFS) not possible/bugged? thanks.

I have developed a custom board with the STM32WL5MOC and I am trying to download a dual core STM32 project to it. I now have two ELF files, one for CM4 and one for CM0+. I am doing by connecting the STLINK-V3SET debugger to 3V3, GND, SWDIO, SWCLK, and NRST pins on the STM32WL5MOC IC.Using CubeIDE, I have successfully downloaded the ELF file for CM4 and verified that it runs correctly (i.e. interacts with peripherals properly, outputs correct debug messages via UART).However, (still using CubeIDE), I have not been successful in downloading the ELF file to CM0+ irrespective of my run/debug configurations. I investigated why using CubeProgrammer instead and here are some observations I have made:I am able to connect to CM4 with no problem, which expected as I can already download to it.I am unable to connect to CM0+, except in the "hot plug" mode.Every time before downloading the ELF files, I manually perform a full chip erase, which is successful for both cores.In hot plug mode, when I t

Hi Im Lalin, Im using STM32L433RC-P MCU for learning.Im facing the issue in reading the data from ADC.Im not getting any error too.Below are the source code attached.Kindly help me to find the solution for this.Note that im using uart.c for debugging purpose.Thanks in advance.

I am using the STM32H742 MCU.Currently, System CLOCK is set to 480 MHz and APB TIMER and AHB maximum CLK is set to 240 MHz.However, the maximum frequency of TIMER and GPIO cannot exceed 25 MHz, so what should I do to make it over 50 MHzAttached is the related code as well.  

Hi i'm using STM32F411RE. I've been reading data from ADC IC using I2C communication. It's 400Khz, and I'm reading using DMA. By the way, if another interrupt with high priority occurs during I2C communication, it runs that interrupt during I2C communication and reads I2C data again. If I operate with DMA, isn't it irrelevant to the interrupt because I2C operates on hardware? Of course, the data comes exactly. If you have any question, please ask me. Thank you.

Hello wonderful ST Community!It has been 2 days since my last major project halting problem! Haha, must be time for a new one!In the last two years since I started to learn STM32 I have never had a Memory management fault so I have no clue what to do! From my research online I have gotten to the point in the screenshot, my understanding form the two registers shown is that an instruction is trying to be executed from a bad mem address, something to do with function pointers?   Of other note is the lack of information in the debug panel on the left hand side, normally it shows the call stack (I think that's what it's called) but it's not showing anything useful. The breakpoint pointer is also not showing, the only reason I know it's a MemManage_Handler is from the Debugger Console.I would love to be able to figure out where the error is originating form but under registers all the registers including the PC are blank, not helpful! Any ideas would be great h

Hello everyoneI have the BLE_TransparentMode firmware available on the ST website, but it's from the Nucleo-68 development kit. Unfortunately, it doesn't have the firmware for 48 pins, as that's the product I'm developing and I need to go through the certification process using the STM32Cube RF Monitor's Test Mode for Bluetooth connection testing. Does anyone have any tips on how to migrate it to the same project folder and change the .ioc file (Cube MX settings), which I didn't want to redo? Or do you know if there's BLE_TransparentMode firmware for 48 pins? I tried to figure out how to do it in CubeIDE but haven't been able to yet. Thanks.

I believe I am seeing the same issue raised here:https://community.st.com/t5/stm32cubeide-mcus/problem-with-stm32h7-erasing-flash-bank-1-while-running-from/td-p/86979but there were no replies before that thread was locked.I'm working on a firmware-update mechanism, testing on a Nucleo STM32H755ZI (rev U).  When a new firmware is available, I erase the inactive flash bank and then write the new firmware into the freshly erased bank, ping-ponging between banks each time the firmware gets updated.// Find which flash bank we are running in now if (FLASH->OPTCR & FLASH_OPTCR_SWAP_BANK) { ActiveBank = BANK2; } else { ActiveBank = BANK1; } ... // Bank-erase the inactive flash, and prepare to program it if (ActiveBank == BANK1) { // Only unlock if currently locked if (FLASH->CR2 & FLASH_CR_LOCK) { FLASH->KEYR2 = 0x45670123; FLASH->KEYR2 = 0xcdef89ab; } FLASH->CR2 |= (FLASH_CR_BER | FLASH_CR_START); // perform bank 2 erase while (FLASH->SR2 & FLAS

Dears,I hope you are doing well!I am running the ST example LoRaWAN End Node FreeRTOS.After switching to class B, the MCU goes into hard fault in the following function call stack: LoRaMacClassBProcess() -> LoRaMacClassBProcessMulticastSlot() -> ComputePingOffset() in Line *pingOffset = ( uint16_t )( result % pingPeriod ); that's because the pingPeriod value is zero. What may be the reason for this?And I don't understand why the functions related to multicast processing is enabled by default in Class B before setting up any multicast configurations from the server to the node.Thank you for your support.Best Regards,Abd El-Rahman KadahStandard Firmware EngineerIoT TeamAZKA Technology Company

Hello ST Team,I’m Shashank Hoysala from Wolkus Technologies.We have two device variants, Fasal 5.0 and Fasal 6.0, which differ in hardware but both use the same STM IC (STM32WB5MMGH6TR). We attempted BLE RF testing following the procedure recommended by the ST team, including updating the Stack, FUS, and binary code.Test Case 1:BLE RF testing between a Fasal device (5.0 or 6.0) and the STM32WB5MMG Discovery Kit worked as expected. Communication was successfully established, and all required tests were completed without any issues.Result: PassTest Case 2:When performing the same testing between two identical Fasal devices (5.0 & 5.0 or 6.0 & 6.0) or between different Fasal devices (5.0 & 6.0), communication could not be established, and all tests failed.Result: FailFor your reference, I have attached a test setup photo and a video demonstrating Test Case 1.My key question is: How can we perform BLE RF testing between two Fasal devices without using the Discovery Kit?&nb

Hello,I am implementing a Web Server in my STM32H743 Board.I have referenced the example implemented in STM32H735G-DK board.Refer to the belowhttps://github.com/STMicroelectronics/x-cube-azrtos-h7/tree/main/Projects/STM32H735G-DK/Applications/NetXDuo/Nx_WebServer(AzureRTOS, NetXDuo, FileX using microSD) But I changed the memory pool location of D1(AXI-RAM) to D2(SRAM1, SRAM2). .tcp_sec (NOLOAD) : { . = ABSOLUTE(0x30000000); *(.RxDescripSection) . = ABSOLUTE(0x30000060); *(.TxDescripSection) } >RAM_D2 .nx_data (NOLOAD): { . = ABSOLUTE(0x30000100); *(.NxServerPoolSection) . = ABSOLUTE(0x30004100); *(.NetXPoolSection) } >RAM_D2In this state, the web page does not function properly. The symptoms are similar to this in the link below.https://community.st.com/t5/stm32-mcus-embedded-software/stm32h735g-dk-takes-a-long-time-to-open-the-web-page/td-p/797153 I restored that part back to the D1 domain. .tcp_sec (NOLOAD) : { . = ABSOLUTE(0x24030000); *(.RxDescri

Hello,I'm chasing a problem where my project is having its configuration of SMPS mode switch back to LDO, and I was realizing that the settings are reset when USB is enabled. Digging into this, I came across this: /* Enable VDDUSB */ if(__HAL_RCC_PWR_IS_CLK_ENABLED()) { __HAL_RCC_PWR_CLK_ENABLE(); HAL_PWREx_EnableVddUSB(); HAL_PWREx_EnableUSBPWR(); __HAL_RCC_PWR_CLK_DISABLE(); } else { HAL_PWREx_EnableVddUSB(); }At a glance, the logic appears incorrect -- why would you enable PWR_CLK when you just checked and it was already enabled? I looked through the v1.7.0 SDK example projects, and saw that most other projects, the line is `if (__HAL_RCC_PWR_IS_CLK_ENABLED() != 1U)`. This only appears here:./Projects/NUCLEO-WBA65RI/Applications/USBX/Ux_Device_CDC_ACM/Core/Src/stm32wbaxx_hal_msp.c: if(__HAL_RCC_PWR_IS_CLK_ENABLED()) ./Projects/NUCLEO-WBA65RI/Applications/USBX/Ux_Device_CDC_ACM/Core/Src/stm32wbaxx_hal_msp.c: if(__HAL_RCC_PWR_IS_CLK_ENABLED()) ./Projects/NUCLEO-WBA65RI/Appl

We're experiencing memory overflow errors when trying to use external PSRAM (IS66WVE4M16EALL-70BLI) with GPDMA for real-time audio capture on STM32H562AII6. Despite having 8MB external PSRAM, our audio buffers cannot be placed there due to DMA timing/access issues.Hardware ConfigurationMCU: STM32H562AII6 (UFBGA169)Internal RAM: 640KBFlash: 2MBRunning at: 250MHz (HCLK)External PSRAM: IS66WVE4M16EALL-70BLICapacity: 8MB (4M × 16-bit)Access Time: 70nsInterface: FMC Bank 1 (16-bit async SRAM mode)Base Address: 0x60000000Application: Real-time Audio CaptureAudio ADC: PCM1862 (I2S master, 48kHz stereo, 16-bit)STM32 SAI: Slave mode receiving audio via GPDMABuffer Requirements: ~416KB total for audio buffersWe need guidance on whether external PSRAM via FMC is suitable for real-time GPDMA applications on STM32H562, and if so, what the optimal configuration should be. If not, recommendations for alternative approaches would be greatly appreciated.Any insights into proper FMC timing, cache manage

Dear ST Support Team,I am currently working with Alliance Memory SPI-NAND Flash (part number:  AS5F38G04SND-08LIN]) and noticed that Alliance Memory lists process compatibility with only three STM32 families: STM32MP1, STM32H723/5xE/G, and STM32H742/3xI/G. Could you kindly clarify:1. Why is the compatibility stated only for these three STM32 families?2. From a hardware and peripheral perspective, what differentiates these families from others such as STM32F4xx, STM32F7xx, and STM32L4xx, which are not listed as compatible? Additionally, during our evaluation of the Serial Nand memory, we encountered an OIP (operation in progress) stuck at 1 issue while working with Stm32F4. With optimized drivers and command sequences, the device operates correctly, but we would like to better understand if there are known limitations or required peripheral features in certain STM32 families that may affect SPI-NAND behavior.Your insights on this would be very valuable for us in deciding

I am experiencing an issue with OTA updates on the STM32WB5MMGH6TR when using an Android application. I would like your guidance and support in resolving it.1. Device / EnvironmentDevice: STM32WB5MMGH6TRAndroid app: Custom OTA implementation using BluetoothGattST BLE Sensor Android App versions tested:ST BLE Sensor 4.18.1 → OTA failsST BLE Sensor Classic 4.20.1 → OTA failsST BLE Sensor 5.2.10 → OTA works successfully2. Problem DescriptionOTA update fails consistently around 65% when updating to a different firmware version Updating with the same firmware version works fine.Android BLE log shows: - system/stack/gatt/gatt_cl.cc:245 gatt_act_write: gatt_act_write() failed op_code=0x52 rt=143 - system/bta/gatt/bta_gattc_act.cc:1132 bta_gattc_write: write status:0 - system/btif/src/btif_gatt_client.cc:211 btif_gattc_upstreams_evt: Event BTA_GATTC_CONGEST_EVT [24]Using ST BLE Sensor 5.2.10, OTA completes successfully regardless of firmwa

Hi I have a PCB board based off of NUCLEOWB55RG board. I am planning to power it externally (3.3V regulator and Lipo battery) but I also want to program it. How can I disable the onboard regulator to program it with USB? Or can I program it using the J-Link board instead? I ran a test by removing the JP1 jumper, the 3.3V output remains 0. However, the ST-LINK doesnt work when I program using CUBEIDE. How can I proceed with this?

  I am using the core STM32H743IITx with Dev board OpenH7XXI-C. PHY IC - DP83848,With RMII configuration. I am facing issue in Ethernet communication for every 10 min of interval, I am getting DMA Error with RBU,ETI,AIS   bit in DMACSR is set. but after few sec(30 to 40sec), It is reconnecting again.DMA descriptors allocated in RAM_D2 section. LWIP_RAM_HEAP_POINTER @ 0x30020000guidance on why this issue happens with regular interval will be helpful .lwip_sec (NOLOAD) : { . = ABSOLUTE(0x30040000); *(.RxDecripSection) . = ABSOLUTE(0x30040060); *(.TxDecripSection) . = ABSOLUTE(0x30040200); *(.Rx_PoolSection) } >RAM_D2MPU Configuration MPU_InitStruct.Number = MPU_REGION_NUMBER5; MPU_InitStruct.BaseAddress = 0x30020000; MPU_InitStruct.Size = MPU_REGION_SIZE_128KB; MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1; MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE; HAL_MPU_ConfigRegion(&MPU_InitStruct); /** Initializes and configures

Hello everyone,I'm currently working on a LoRaWAN End Node dual-core application using the NUCLEO-STM32WL55 board, and I'm facing unexpectedly high power consumption during transmission. I'm seeing very high current consumption — around 220 mA. I would like to reduce it, but I'm not sure what I'm missing.Any help or advice would be appreciated. Thanks!— Maroua

Hello,I am currently working on the STM32WB5MM and I need a debugger terminal to monitor some application functionalities.While testing, I noticed that in the HeartRate example, enabling the following macros allows me to print debug traces successfully:#define CFG_DEBUG_TRACE_UART hw_uart1#define CFG_DEBUGGER_SUPPORTED 1#define CFG_DEBUG_BLE_TRACE 1#define CFG_DEBUG_APP_TRACE 1#define CFG_DEBUG_TRACE_FULL 1 Additionally, including the header dbg_trace.h in the main.c makes the traces available and I can also display messages from main. ( at least to test if its working )However, when I create a new project and follow the official guidelines here:STM32WB BLE STM32CubeMX - Enable traces,I do not see any output on the terminal, regardless of the configuration.Could you please advise what additional configuration or source files (e.g., UART initialization, or missing debug modules) are required in a custom project to replicate the behavior of the HeartRate example?Thank you in advance

HI~I use STM32H563ZI NUCLEO.And I develpe LPUART GPDMA , but  LPUART GPDMA2 rx interrupt not working.LPUART RX GPDMA ch0LPUART TX GPDMA ch1Let me know how to config. Thanks

Hi, Does Cubeprogram CLI support OTP commands with STM32WL33? I have try below command get below information Error: OTP programming commands are not supported with STLINK interfaces for this device.   Thank you Best Regards. Ethan Chen

I'm working on NUCLEO-WB55RG board, and I cannot access to my NUCLEO-WB55RG board.1. I first tried DFU Mode with the setting below, but my computer couldn't find it.2. after that, I connected my board through ST-LINK with the setting below and used STM32CubeProgrammer for connection, But No STM32 target found! error occured. I've tried all the reset settings and Mode settings but same error occurs.3. So I gave up on checking the inside of the board. And I started IDE. I downloaded some examples and I run it. And now I see the error :Failed to execute MI command:target remote localhost:61234Error message from debugger back end: localhost:61234: Connection timed out.4. So I tried to follow link below(https://community.st.com/t5/stm32-mcus/how-to-solve-debugger-connection-issues/ta-p/49693)but I cannot see debug option on changing the pinAnd I also cannot access to my board with CubeProgrammer,And I also cannot get any different result by changing Debugger settings to Under Reset.I'm