STM32 MCUs

I'm using the STM32H747 DCMI peripheral to capture video from an OV5640 camera, and I've encountered a confusing situation regarding synchronization signal polarity.Development EnvironmentBoard: STM32H747I-DISCOCamera Module: B-CAMS-OMV (OV5640)Firmware: Official example projectSTM32CubeH7/Projects/STM32H747I-DISCO/Examples/DCMI/DCMI_CaptureMode/CM7/Src/main.cOV5640 ConfigurationIn the OV5640 register 0x4740 (POLARITY CTRL00), I configure:{OV5640_POLARITY_CTRL, 0x22}According to the datasheet, this means:Bit[5] = 1 → PCLK polarity: Active highBit[1] = 1 → HREF polarity: Active highBit[0] = 0 → VSYNC polarity: Active lowSo the camera outputs:HREF high during valid line dataVSYNC low during valid frame dataPCLK rising edge for pixel samplingSTM32 DCMI ConfigurationIn the STM32H747 DCMI_CR register, I configure:DCMI->CR |= (1 << 7) | (1 << 6); // VSPOL = 1, HSPOL = 1According to the STM32 reference manual:VSPOL = 1 → VSYNC high = invalid f

Can you help with new research on secure boot?   I am a cyber security researcher at the University of Bristol in the UK. I would like to your views on Secure boot.   My area of interest is developer-centred security, specifically in the issues that developers face when trying to build secure IoT devices.    If you have ever looked at implementing secure boot, or used it in your current development, or maybe think it to complicated, then I would really like to hear from you. Please take just 8 to 10 minutes to do this short survey on secure boot. https://universityofbristol.eu.qualtrics.com/jfe/form/SV_06xKUNve9ioJ5T8   If you have any questions, you can contact the researchers directly at fe23957@bristol.ac.uk

I have a problem, where there's simply no error, but the output, is not showing on the screen. The system has detected the board, and all the correct steps are followed, even though, my hello world code is not been printed. I am using stm32cubeide version 2.0.0 and im using a nucleo-h723zg. Also, the board is first showing a static red light when plugegd in to the laptop, and then a patternt that repeats ----> red, green red,green and then green for 1 second and then it keeps on going. I even flashed my whole baord and erased everything, despite that, it is showing the same behaviour. So far, I haven't recieved any error, the only thing is that i am not able to see the output on the screen of the ide that im using.  Here's a link for the led problem(chatgpt says its a firware issue evn though i downlaoded the correct firmware) Video link: https://youtube.com/shorts/vETuGu5Kbfg?feature=share

Hello,We are currently working with the NUCLEO-WL55JC1 board for LoRa communication and have a few technical queries. 1. STM32WL as Gateway / P2P ReceiverWe are planning to use two NUCLEO-WL55JC1 boards, where: One board will act as a LoRa end node The other board will act as a gateway or P2P receiver Is there any gateway or P2P receiver firmware example available in the STM32WL SDK for the NUCLEO-WL55JC1 board? 2. LoRaWAN Gateway Capacity We would also like to understand the theoretical number of end nodes that can be supported by a single LoRaWAN gateway under the following conditions:   Payload size: 16 bytes Spreading Factor: SF10 Uplink transmission interval: 1 hour per nodeAny calculation method, reference document, or guideline from your side would be very helpful.  

HelloIm developing a CAN Bus node and with space constrains, so i ve looked in stm32 products and a qnf32 packages looked perfect for example stm32G0B1 has FDCAN. The problem...These QFN32 dont expose HSE pins. I just can use HSI with 16 MHz +- 1% wich is not reliable for FDCAN, especially for industrial applications with many nodes. I dont understand why the mcu hás 2 FDCAN peripherals if theres no reliable clock to Run them.Im i missing some thing here? At are my alternatives? I now that QFN48 hás HSE, but i dont need só much io and the packages is bigger.Help here 

Greetings,Being rather new to designing/connecting electronics components, I got some questions regarding battery monitoring.Setup:NUCLEO-L432KC, driven by regular AA NiMH batteries in 3S configuration. Voltage is regulated by a small board based on a TI TPS63802 buck-boost-converter, which ensures a stable 3.3V output for the Nucleo board. The MCU is running stable with this power supply, everythings works out so far.Task:Now there's monitoring of the individual battery cells on the table. With three cells, three ADC inputs are required (if you don't do some switching outside of the MCU). The NiMH cells in question are rated at 1.2V nominal, with close to 1.4V when at full charge. Thus, if you measure the voltage after each cell, it would result to 1.2V, 2.4V and 3.6V nominal (or 1.4V, 2.8V and 4.2V max).Gathered intel:I understand that the ADC can only measure voltages between 0 and VREF, which equals to the 3.3V input voltage.Regarding the measurement of <3.3V battery pack nodes,

Hi,I wonder how the motor control unit should behave if a speed ramp is programmed right after a torque ramp?Following code snippet shows this setup:// Set Torque/Iq limit MC_ProgramTorqueRampMotor1(iqLimit, 0); // Programm speed ramp MC_ProgramSpeedRampMotor1(speed, 500); // Start motor MC_StartMotor1();Do I understand correctly that this code should lead to the following behavior?the motor starts in speed modeif the load driven by the motor increases the speed will decreaseif the load increases further the motor will run with decreasing speed until it reaches the torque/iq limit set by  the MC_ProgramTorqueRampMotor1() functionthe motor will stop and deliver a constant torque - the torque programmed with MC_ProgramTorqueRampMotor1() Best regardsB0bbyR4y

Hi there!i start one of my new project with STM32cubeide 2.0. First i start with configure mu MCU in STM32CUBEMX in this casa STM32G031K8T6 afther i configurate all pin i create a poject . So afther i import my project in STM32CubeIde 2.0 and i build gave me this error:Core\inc\main.h: fatal error: stm32g0xx_hal.h: No such file or directory #include "stm32g0xx_hal.h" but i check with F3 and this file exist , so please someone can help me ? Thank youSergio

 I'm developing a power bus manager where I monitor current and voltage drop across a shunt resistor. I chose the STM32G484 as the MCU because it has enough OpAmps and ADCs for my project.However, I have a question that might only be related to electronics, but I'd like to be sure it won't affect the MCU.The bus is supplied by a DC-DC switched-mode power supply where the highest voltage is 12V. We know the voltage drop across the shunt resistor is minimal. So, could I connect the "plus" and "minus" inputs directly to the shunt resistor? Is it necessary to define the gain loop? Or can I work without it? In this case, the question is whether the MCU allows parameterizing the input where "plus" and "minus" are connected directly to the GPIO without any internal interference.Thank you for your support.ps: The project is being developed under CC-By 4.0 license and is available at https://kepr.rapport.tec.br

Hello,I would like to get information about the availability of the following devices:STM32H562IGK6 UFBGA 144 package (10 × 10 mm, 0.8 mm pitch)STM32H562IGT6Could you please clarify:Are these devices currently available in stock for production volumes (~1,000 pieces)?If they are out of stock, what is the reason and what is the expected availability / product longevity?Are there any devices available now for prototyping, in quantities of about 50 pieces?Thank you for your support.Best regards,Aymen

I am working bare-metal on an STM32L433RCT6 (no HAL). I am seeing a precise data bus fault whenever I access a GPIO register.Fault details from the debugger:Fault type: Precise data bus faultBFAR: 0x48000000From RM0394, 0x48000000 is the GPIOA base address, so the fault occurs exactly on GPIO access.The faulting instruction is a normal GPIO register read/write (e.g. ODR access). The GPIO struct layout and offsets are correct, and the compiler generates correct code.I understand that on STM32, a precise bus fault on a valid peripheral address usually means the peripheral clock is disabled.However, I explicitly enable the GPIO clock before accessing it:*(volatile uint32_t*)0x4002104C |= (1 << 0); // RCC_AHB2ENR, GPIOAENAdditional context:Custom register definitions for GPIO/RCC (not HAL)Fault occurs before/at first GPIO accessProgram resets and lands back in Reset_HandlerBFAR(via Fault Analyzer) consistently reports 0x48000000I will also attach the stm32l433xx.h, stm32l433xx_gpio_d

Posted on July 25, 2013 at 11:26 Hi ! When running the VCP USB Stack (STM32_USB-Host-Device_Lib_V2.1.0) on my STM32F4 i got an error code on my Win7 x64 sytem. ''This device cannot start(code 10)'' I'm using the USB HS Port on PORTB in FS mode. Finally i found a solution for it. The source code of the file usbd_conf.h must be changed in the following way: Old: /* CDC Endpoints parameters: you can fine tune these values depending on the needed baudrates and performance. */ #ifdef USE_USB_OTG_HS #define CDC_DATA_MAX_PACKET_SIZE 512 /* Endpoint IN & OUT Packet size */ #define CDC_CMD_PACKET_SZE 8 /* Control Endpoint Packet size */ New /* CDC Endpoints parameters: you can fine tune these values depending on the needed baudrates and performance. */ #ifdef USE_USB_OTG_HS #define CDC_DATA_MAX_PACKET_SIZE 64 /* Endpoint IN & OUT Packet size */ #define CDC_CMD_PACKET_SZE 8 /* Control Endpoint Packet size */ This change is only necessary when using t

I have a PCBA design that uses a Molex Picoblade connector instead of RJ45 due to enclosure height restrictions. The PHY IC is a LAN8742A and the MCU is STM32H743VIT6, the ethernet is also POE.I have spliced, a ethernet and 8pin Picoblade connector together to make a 6in cable that plugs into a router. I figured with such a short distance and being 10/100 that while not ideal should still work. I maintained the RJ45 pinout. There is also a POE circuit using a small Silvertel AG9905 module, that is working as expected.Of the 10 boards 3 seem to work but not without some issues. They refuse to work off cold boots (from off to powered) they only seem to work after a warm boot. Also they arent fully stable, sometimes connecting or disconnecting the cable can crash the system or pinging the system can also crash the working boards.For the remaining 7 I am able to assign them a static IP and random MAC, and I can confirm this by seeing the device connected on the router UI, but when I ping

Hello.  I am experimenting with securing a STM32H503 using password authentication, which will ultimately be an automated process.I created a simple password for testing and created the password hash in board_password.bin and da_password.bin(just for comparison, I also used Segger's advice and tried certutil and the resulting board_password.bin file is identical, so I'm pretty sure the password hash worked).I set the chip to PRODUCT_STATE provisioning and programmed the chip with the password using the following:STM32_Programmer_CLI.exe -c port=SWD speed=fast ap=1 mode=Hotplug  -ob PRODUCT_STATE=0x17STM32_Programmer_CLI.exe -c port=SWD speed=fast ap=1 mode=Hotplug -w board_password.bin 0x8FFF000Both of these commands succeeded with no errorsAs recommended, I locked the OTP so I wouldn't accidentally damage it by overwriting by:STM32_Programmer_CLI.exe -c port=SWD speed=fast ap=1 mode=Hotplug -ob LOCKBL=0x1Again, no errorsFinally I set PRODUCT_STATE to PROVISIONED and aga

I have legacy SBSFU based system running on an stm32f429 for a few years now, based on the STM32F413ZHT6 demo code that was present in the package. I am now interesting to using the KMS feature of SBSFU but after reading um2622 /seeing https://www.youtube.com/watch?v=YjiNaTHQp2s I am a bit at a dead end on how to start as none of the kms files seem to be compiled in my bootloader. I am now getting the impression there is no KMS support at all on an stm32F4, this based on the fact that for example Figure 14 with the project folder structure in um26222 shows images with _KMS but this does not exist for the stm32f4 version I started from. So is KMS a no-go on STM32F4 because it uses features not available on STM32F4 ?Looking at Figure 4 SBSFU security IPs vs. STM32 series of  um2262 this seems to be the case if I understand that correctly (it seems to be needing this Firewall thing) ?If it is not supported, I would suggest adding this information at the very

I am trying to integrate a very simple TouchGFX Application into the SBSFU (I only really need SB right now) application, on STM32U5A9J-DKI've switched out the Nonsecure application for mine, I've modified flash_layout to do primary only, no external loader, 1 image. I modified the template loader script to have a Framebuffer section that spans SRAM3 (minus the secure section) and SRAM5. I'm using the startup_stm32...c that the original nonsecure application uses.Right now. It builds and boots, and shows "Jumping to first Image Slot" and just sits. I think it's getting into the Appli_Secure, because the Users LEDs on my board are lighting up.I found some verbiage elsewhere that indicates that I likely need to unsecure the IOs and SRAMs that the new NonSecure application uses, but when I start doing that, things go haywire.For example, I've got my project setup so that I can switch back to using the original demo Appli_NonSecure with my modifed flash_layout.h and linker script, and so I

I would like to know how I can program 2 MCUs (stm32wb55cgu6) simultaneously.Currently, I am programming the FUS and BLE binaries (firmware developed by the company).We need to double production, but I can't program via DFU because an error always occurs in one of the MCUs. Is it possible to program 2 MCUs simultaneously, or is that not possible?

Hello,Recently, I’ve been asking several questions about STM32WB55 BLE behavior, and the respected @FilipKremen  has provided me with great support.It turns out that all this time I was actually working with fake Chinese chips. I suspect that some of the strange issues I faced were due to that.So, I’ve now bought original STM32WB55RGV6 chips and replaced them in my devices.However, with exactly the same firmware (which worked fine on the fake chips), the BLE does not start at all.Here’s what I tried:Regenerated the project using CubeMX and CubeIDECreated a fresh new BLE project following this official tutorial: https://www.youtube.com/watch?v=CKYWy7LKL68&list=PLnMKNibPkDnG9JRe2fbOOpVpWY7E4WbJ-&index=16Tested on two different custom boards — same resultOn both boards, other functions seem fine (e.g. I can toggle LEDs on button press, and I can hit the button interrupt in debug)(I flash the chips via J-Link)However, when I set a breakpoint at void APP_BLE_Init(void), th

I have an STM32L011F4P6 with an RTC.  It is running at 3.3V and 16 MHz off the internal HSI RC clock.  The RTC is driven by a +/-20ppm 32.768 KHz crystal.  It is running at room temperature (23-25C).  After calibration, I am losing several seconds per day!  What's wrong?Here's more information:I have a auto-calibration routine where it will output a 1Hz signal on PA2 and capture the rising edges using TIM2 channel 3, running at 16 MHz.  I capture the start time (1st edge), I interrupt on overflow and add 65536 to a 32bit variable, and I capture the final (33rd) edge to get the total number of 16MHz clocks in 32 seconds according to the RTC.  At the same time, I have a GPS module with a 1Hz output fed into PA10.  I set up TIM21 channel 1 identically to the TIM2 setup, to capture the total number of 16MHz clocks in 32 seconds according to the GPS.I take the two numbers and find the difference, not in PPM but in units of calibration (0.954 PPM)

On a custom board, I would like to use the BlueNRG GUI (v.4.7.1) to run the tests described in AN4818 (rev.8) using the DTM firmware embedded in BlueNRG-1_2 DK 3.2.3.I got a connection and I am able to send basic commands, like ACI_TEST_TONE START and STOP. I see the RF signal very clearly. So, the connection with the device is good.If I open the IFR Device configuration to start LS crystal measurement and HS startup measurement I can select the options but as soon as I press the WRITE button, I got an HCI Timeout error and I need to reset the BlueNRG to get the link again.ON a side note, as soon as I connect with the Blue GUI I got a message saying "Old firmware detected on the motherboard", but I am already using the latest.Any idea? It would be nice to leverage on the BlueNRG GUI to run these tests and fine tune the LF crystal and the HS crystal startup time.Kind regardAndrea   

In my project I've set the SPI clock to 125MHz; with a SPI prescaler value=4 all works good, when I set it to 2 the SPI stops working and ther is no clock signal.Any helps ? Thank youCarloV

I call HAL_UART_Init() with LPUART1 at 20Mbaud but when I activate assertion it fail at IS_UART_BAUDRATE().The IS_UART_BAUDRATE() is not correct for LPUART that can have a baudrate up to 53.3 Mbaud.Also for UART, the comparaison in IS_UART_BAUDRATE() should be <= instead of < like in IS_LL_USART_BAUDRATE().

Title modified by an ST moderator to be inline with the content. My goal is to establish CAN communication between Riverdi display - RVT50HQSFWA01 and my laptop. After developing a test GUI using TouchGFX 4.26.0, when I added the code patch for CAN communication then I keep on getting various build errors due to comaptibility issue between TouchGFX and STM32Cube IDE packages. If anyone has tested CAN communication for Riverdi Display boards that can help then kindly reply. I have been trying to get this done for quite sometime now and have been stuck at what seemed like a very simple task.   For the sake of reference, the latest build error is : make: *** No rule to make target 'C:/TouchGFXProjects/LIB_display_1/TouchGFX/target/CortexMMCUInstrumentation.cpp', needed by 'Application/User/TouchGFX/target/CortexMMCUInstrumentation.o'. Stop.make: *** Waiting for unfinished jobs...."make -j22 all" terminated with exit code 2. Build might be incomplete. 06:43:53 Build Failed. 2 e

Hi,I've a project with TouchGFX and FreeRTOS on an STM32H7RS. I was updating the library, regenerating the code from CubeMX but, I've noticed that, for some reason, the file \Appli\TouchGFX\target\generated\nema_hal.c has changed// from - #define NEMAGFX_MEM_POOL_SIZE 16128 /* NemaGFX byte pool size in byte */ // to + #define NEMAGFX_MEM_POOL_SIZE 24320 /* NemaGFX byte pool size in byte */but I can't find in the .ioc inside the CubeMX where this value is set and why it has been changedThanks

I've had problems with sd_diskio.c used for SD card I/O with FatFs.CubeMX version is 6.16.0.I'm using SDMMC with DMA, so consideration needs to be given to cache coherency and alignment.I have both these set:#define ENABLE_SD_DMA_CACHE_MAINTENANCE  1#define ENABLE_SCRATCH_BUFFERHowever, I've found some bugs in the code:In SD_read, the alignment check:#if defined(ENABLE_SCRATCH_BUFFER)if (!((uint32_t)buff & 0x3)){#endifshould have the 0x3 changed to 0x1f, as cache alignment requires 32-byte alignment, not 4-byte.There's another case of this in SD_write.Furthermore, there's a bracketing problem in SD_write with the code under ENABLE_SCRATCH_BUFFER conditional compilation, which is supposed to be invoked when the buffer is misaligned as an else condition for if (!((uint32_t)buff & 0x1f), but is instead an else condition for a DMA success check. This means that the scratch buffer code does not run at all when a buffer misalignment is detected.To fix it, I added a closing brace