STM32 MCUs

I am successfully receiving feedback from the motor side, including the encoder values, which are being read accurately.I am writing to update you on the motor control project and to seek your guidance on an issue I'm currently facing.Project Configuration:Microcontroller: STM32H723ZGMotor Drivers: Rhino RMCS-2303 (Quantity: 2)Motors: Rhino DC Motors (Quantity: 2)Hardware Setup:Motor 1 (Left Motor):UART Communication: USART2 (PA2-TX, PA3-RX)Control Pins: ENA (PC0), DIR (PC2), BRK (PC4)Feedback: ADC (PA0) - OptionalSlave ID: 7Motor 2 (Right Motor):UART Communication: USART1 (PA9-TX, PA10-RX)Control Pins: ENA (PC1), DIR (PC3), BRK (PC5)Feedback: ADC (PA1) - OptionalSlave ID: 6Current Status:I have successfully implemented the basic motor control system with the following functionalities::white_heavy_check_mark: Forward movement (F command):white_heavy_check_mark: Backward movement (B command):white_heavy_check_mark: Left turn (L command):white_heavy_check_mark: Right turn (R command):whi

Dear ST team , My STM32H753ZIT6 MCU is designed for working at 3.3V, Is this voltage compatible with the ST Link programmer? I want to know whether I need to put any level translator in between for SWDIO, SWCLK, SWO, VCP_RX, VCP_TX, NRST signals and the programming connector if 3.3V is not compatible.RegardsShyam

Hello,I would like to confirm how VBUS behaves in STM32 USB OTG depending on the Host/Device mode.Specifically, I would like to ask the following:When STM32 is configured as Host mode, should the STM32 source 5 V onto VBUS?When STM32 is configured as Device mode, does it only sense/monitor VBUS as an input?Is this behavior handled automatically by the internal OTG controller, or does it require an external VBUS power switch or additional external circuitry?Additionally, I would like to ask about a hardware configuration where an external 5 V supply is always present on VBUS, regardless of the STM32 Host/Device configuration.In this case, I would like to confirm:Whether this could cause any issues when STM32 operates in Host modeWhether it could affect Host/Device role detection or OTG behaviorWhether USB enumeration and normal data communication would still function correctlyIn other words, I would like to know whether a design where VBUS is always supplied by an external 5 V source is

Issue Description:I am using the `STM32_Programmer_CLI` to flash the BLE Wireless Stack on an STM32WB series MCU. However, after the programming process is complete, the memory read returns an unexpected value at the Stack Version address, even though the GUI shows the correct version.**Steps to Reproduce:**1. **Read Initial "Stack Version":**```textReading 32-bit memory contentSize : 4 BytesAddress : 0x200100140x20010014 : 01180003```*(Note: 01180003 corresponds to Version 1.24.0.3)*2. **Delete "Stack FW"**3. **Read "Stack Version" again:**```textReading 32-bit memory contentSize : 4 BytesAddress : 0x200100140x20010014 : 00000000```4. **Flash "stm32wb5x_BLE_Stack_light_fw.bin"**5. **Read "Stack Version" after programming:**```textReading 32-bit memory contentSize : 4 BytesAddress : 0x200100140x20010014 : 130E0019```**The expected value is `01180003`.****Comparison with STM32CubeProgrammer GUI:**If I then switch to the GUI version of STM32CubeProgrammer:* **Connect** --> **Firmware

Hello,I the Reference Manual (RM0410 Rev 5) for STM32F769I-DISCO, DMA_P1 is not shown connected to AHB Bus Matrix. It is intentional or error in the diagram ?Thanks,Debasish Das  

Hello ST Community Team,We are currently working on an STM32N6-based design using TouchGFX and would appreciate your guidance regarding the LTDC framebuffer address configuration.Setup details:Display resolution: 800 × 600Graphics framework: TouchGFXExternal memory device: eMMC – IS21ES08GA-JQLIThe eMMC is used as external memory in the systemWhile configuring TouchGFX and LTDC, we need to specify the framebuffer start address for the LTDC layer. Since the framebuffer is not located in internal SRAM, we would like to understand:What LTDC framebuffer address should be provided when using an external eMMC (IS21ES08GA-JQLI)?Is it recommended (or required) to first map the framebuffer into an external RAM (such as SDRAM/PSRAM) instead of directly using eMMC?Are there any reference examples or application notes showing TouchGFX with LTDC using external eMMC for framebuffers?Any clarification on the correct memory mapping and recommended architecture for this use case would be very helpful.T

Hi ST team,I am using X-CUBE-SBSFU V2.8.0, project: Device: STM32H753Base example: NUCLEO-H753ZI 2_ImagesI ported UART pins/port for my H753 EVAL board.ProblemBuild fails in SECoreBin with GNU14.3 toolchain:C:/.../2_Images_SECoreBin/Src/se_crypto_bootloader.c:222:(.text.SE_CRYPTO_Decrypt_Init+0x16): dangerous relocation: unsupported relocation However , Then i shifted to 13.3 tool chain , then everything works fine for me.  Please confirm whether this is a known GCC 14.3 compatibility issue for SBSFU v2.8.0 key generation. If yes, could you share an official patch for prebuild.sh / key assembly generation so generated key symbols are fully compatible with newer GNU/binutils?

Hey I am having trouble tryng to connect my stm32g473 to a canbus. I am using a l9616 as a transceiver and the bus is functions as I have connected to it with an stm32f722re with the same l9616.The clock is 64Mhz,Ive used the canbit time calculation website to define the values of nominal time 1 and 2 to achive 500kbs.Also using NVIC and it seems to be configured fine. When tested in loopback the interrupt is called and the messages are received.This is the init with the filter config,as I ve understand I am not filtering anything and any of the messages on the bus should get to my uC.When running the state of hfdcan1 is Busy and also no error code show up.FDCAN_HandleTypeDef hfdcan1; /* FDCAN1 init function */ void MX_FDCAN1_Init(void) { /* USER CODE BEGIN FDCAN1_Init 0 */ /* USER CODE END FDCAN1_Init 0 */ /* USER CODE BEGIN FDCAN1_Init 1 */ /* USER CODE END FDCAN1_Init 1 */ hfdcan1.Instance = FDCAN1; hfdcan1.Init.ClockDivider = FDCAN_CLOCK_DIV1; hfdcan1.Init.FrameFormat =

I would like to use Zephyr as the RTOS for my project using an STM32WB55 and OpenThread.  Attempting to build the simple example 'shell' application fails for the nucleo_wb55rg board. west build -b nucleo_wb55rg c:\Projects_local\stm32_openThread\shell_openThread -p --build-dir c:\Projects_local\stm32_openThread\shell_openThread\build\nucleo_wb55rg -- -DBOARD_ROOT='c:\Projects_local\stm32_openThread\external\zephyr' -DCONFIG_NO_OPTIMIZATIONS=y The error returned is:-- west build: making build dir c:\Projects_local\stm32_openThread\shell_openThread\build\nucleo_wb55rg pristine -- west build: generating a build system Loading Zephyr default modules (Zephyr base). -- Application: C:/Projects_local/stm32_openThread/shell_openThread -- CMake version: 4.1.2 -- Found Python3: c:/Projects_local/stm32_openThread/.venv/Scripts/python.exe (found suitable version "3.12.4", minimum required is "3.10") found components: Interpreter -- Cache files will be written to: C:/Projects_local/stm32

Hello Community,I am migrating a prototype CMake application to TrustZone for a test board targeting the STM32U575VGT6 MCU.  Launching a debug session for my project generates the following errors.  `I've attached verbose console error output in the attached file (console_error_output.txt).CubeProgrammer confirms I have the set Option Byte for TZEN .The debug configuration should be flashing the secure image before the non-secure.GTZC_NS/S are enabled. I have been following the tutorial Develop TrustZone enabled applications on STM32L5 ARM MCUs with STM32CubeIDE - Webinar Replay .  The instructions at 20:00 are completely arcane and I realize I am out of my depth of expertise to get this small project to work (.ioc attached).Does anyone have an application note or tutorial, pertinent to the U5 series, that explains how to flash and launch debugger sessions for a pure CMake + TZ project using only STM32CubeIDE 2.1.0, CubeMX 6.17.0, and CubeProgrammer 2.22.0

I am using Nucleo-F446RE board and trying to verify the TIM1 update interrupt and PWM, the PWM is generated but if i put a break point in the update interrupt it does not halt, what is the reason?int main(void) { /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_USART2_UART_Init(); MX_TIM1_Init(); /* USER CODE BEGIN 2 */ HAL_TIM_PWM_Start_IT(&htim1,TIM_CHANNEL_1); /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) { /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ } /* USER CODE END 3 */ } i have put a break point in the

according to the Readme where i need to place the .nx_data in order to prevent Build errors.nx_data (NOLOAD): { . = ABSOLUTE(0x341D4200); *(.NxServerPoolSection) . = ABSOLUTE(0x341F0200); *(.NetXPoolSection) } >RAM #### <b>NetX Duo usage hints</b> - Depending on the application scenario, the total TX and RX descriptors may need to be increased by updating respectively the "ETH_TX_DESC_CNT" and "ETH_RX_DESC_CNT" in the "stm32n6xx_hal_conf.h", to guarantee the application correct behaviour, but this will cost extra memory to allocate. - The NetXDuo application needs to allocate the <b> <i> NX_PACKET </i> </b> pool in a dedicated section. Below is an example of the section declaration for different IDEs. + For EWARM ".icf" file ``` define symbol __ICFEDIT_region_NXDATA_start__ = 0x341D4200; define symbol __ICFEDIT_region_NXDATA_end__ = 0x341F01FF; define region NXApp_region = mem:[from __ICFEDIT_region_NXDATA_start__ to __ICFED

I've developed a board using an STM32F767ZI to manage a set of power supplies via PMBUS. I've connected 4 I2C buses, each with 5 slave devices (power supplies), managing a total of 20 slave devices.My application continuously polls the slave devices to get their status. When I use a single I2C peripheral, I never get any read errors. However, when multiple I2C peripherals are running simultaneously, I get bursts of read errors on all 4 buses (though not all at the same time) approximately every 30 seconds to 1 minute.Each I2C polling routine runs in a separate FreeRTOS task.I've tried using the HAL drivers I2C in Polling, IRQ, and DMA modes. I've also tried using the I2C peripherals in PMBus mode (CubeMX Setup). The bus speed is 100KHz. I tested enabling one peripheral at a time and noticed that the frequency of errors increases as the number of enabled peripherals increases (no errors with only one I2C enabled, errors every 30s/1m with 4 I2C enabled).Can anyone suggest what I should i

I have come across an issue which I believe is a bug in the implementation of the osThreadFlagsWait function. Scenario A thread is waiting on a flag (e.g. 0x2u) for a timeout above 0, before this timeout should occur, there are multiple other flags set on the thread (e.g. 0x1u) using osThreadFlagsSet, this results in the osThreadFlagsWait function returning with a value of osErrorTimeout sooner than the set timeout. Cause The xTaskNotifyWait function which is called by osThreadFlagsWait returns each time the 0x1u flag is set, resulting in this section of code being run: Note that t0 is set to the return value of xTaskGetTickCount() at the start of the wait loop, so is the start time, tout is a timeout value passed to xTaskNotifyWait, which is originally the set timeout, but is adjusted each time the xTaskNotifyWait function returns. The issue with the code above is that the value of td is the total time that the thread has been waiting, this is subtracting fro

I am trying to establish an ethernet comms with the STM32F207ZGT6 MCU.I have configured the pinout in CubeMX and followed various online resources for implementing LWIP, however I have had no success in discovering the device on my network, and thus am unable to ping. The Link led on the ethernet port lights up after my computer is connected, but no communication is acheived. I am using a DP83848MSQ/NOPB PHY. Could someone please shed some light on the CubeMX configurations for the LWIP. I have disabled DHCP and assigned a static IP. My computer is on the same subnet (192.168.1.xxx)as assigned in CubeMX for the MCU's LWIP settings. Further, both my computer's ethernet port driver and the MCU are assigned the same netmask (255.255.255.0). The MCU and PHY are configured to operate in RMII. I am currently not using FreeRTOS. I read elsewhere in a thread that there are some bugs associated with memory allocation for the heap, alongside issues with the HAL driver, ethernetif.c and lwip.c fi

Hello everyone,   as mentioned in the title, I'm using STM32WBA in a project. Immediately after sending data to the stm32wba  coordinator, I add an expression to the backup register and reset the processor using `Nvic_system_reset`. I check this at startup and then run a different routine. It runs continuously in a loop.   My question is, are there any disadvantages to resetting the processor? Would it cause problems like freezing? Does this situation lead to a logical fallacy? What exactly does the MCU do with the reset process?   HAL_NVIC_SystemReset();  

In the document UM3234 we see the following description of clock configurationOn my Nucleo board, I haven't blown any fuses and measured a clock frequency of 32 MHz. Since the XSPI is configured to have a prescaler of 2 by BOOTROM (also mentioned in UM3234), this implies that the board is using the default clock scenario. The document also mentions this regarding the nominal scenario."During secure boot, the boot ROM sets up PLL1 to switch to CM55, APB, AHB, and AXI clocking at the nominalboot frequency"Does this mean that if i dont have secure boot enabled yet, ill get the default clock, and as soon as I enable secure boot my clock frequency will increase to 400 MHz?. 

Greetings! So I have a personal project, using a STM32U585 MCU, with a self-designed board, in which I have a bootloader and the main firmware. So basically I implemented a protocol for communicating with the board, I have a C program that sends a command and the board sends data (around 20Kb), using USB.The scenario is the following: I flash the firmware with the bootloader, after flashing, the bootloader jumps into the main program and starts running, I send a command (via host) to get data and the board sends me data and everything is running smoothly. The problem starts when I unplug the board and plug it again, when I send the command to get data, the board starts to send it and then it completely freezes. Another curiosity, this situation only happens when I plug the board in a USB hub... if I plug the board directly to the laptop, I won't have any problem. Any clue of what can be the problem? Power related? Is there any issue with the jump to the main pr

I just started looking at the STM32C071 family as an alternative to the STM32F042 and STM32F072 we currently use. To my disappointment the USB stack for the C071 is a total mess (dozens of files and complete spaghetti) and on top of that it seems to be written by Microsoft. So there is absolutely no way we are going to use that.Did I miss some other option for the USB device library? This USBX stuff definitely is no option at all.At first glance it looks like there are no significant differences between the USB hardware of the C0 and F0 if only used as device not host. So I am wondering if I can simply use the F0 libraries (which we have debugged and optimized…) on the C0. Or are there any hidden traps?

Greetings,I have an ST32L151CCT6 part with pin PB5 connected to the DE pin on an THVD1400DR RS485 Transciever, my whole system is designed to be low power, and the MCU enters stop mode to achieve that from its side, every pin goes to analog mode. I have meassured the power consumption of my whole system when I take out the transciever and it reaches the expected 40uA.The problem:Current rises up to 11mA when I solder the transciever back, even so, I mannaged to find the exact connection with the problem, when I raise the DE Pin on the part breaking the direct connection to PB5 the higher current consumption problem dissapears.What kind of worked:Setting the PB5 pin to INPUT makes the current consumption go up to 150uA, wich is way higher than we aimed for.What I have tried so far:I tried placing a 470K resistor in series to the trasnciever and the voltage at the DE Pin went to 0.7 volts, wich shouldn't as the datasheet for the transciever states having an 2M pull down resistor. If I go

Split from FATFS for STM32u575 - this is a different issue.helloo, i did the same exact thing and everything compiled properly, but after running it, the code freezes when the f_mount() function is encountered. Did you find a solution to your problem ??  

Hi Folks, I'm working on pattern generation on GPIO pins and I've done it successfully using bare-metal programming approach. I used TIM1 to trigger DMA2 to take data from a buffer and send it GPIOA->BSRR.  But when I try to change the timer from TIM1 to TIM2 and change the respective DMA stream, the same code does not work. code:   uint32_t signal1[6]; //pattern no included // Enable clocks for GPIOA, TIM2, and DMA1 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN; RCC->APB1ENR |= RCC_APB1ENR_TIM2EN; RCC->AHB1ENR |= RCC_AHB1ENR_DMA1EN; // Configure GPIOA Pins 0-5 as output GPIOA->MODER &= ~0x00000FFF; // Clear mode for PA0-PA5 GPIOA->MODER |= 0x00000555; // Set PA0-PA5 as General Purpose Output // Configure TIM2 for DMA requests on update event TIM2->PSC = 0; // Set prescaler to 0 TIM2->ARR = 999; // Set auto-reload value (adjust for timing) TIM2->DIER |= TIM_DIER_UDE; // Enable update DMA request TIM2->CR1 |= TIM_CR1_CEN; // Enable TIM2 // Configure

Hello,Using a NUCLEO H7S3L8, I'm trying to run a test where, using circular DMA with a linked list, I'm trying to send a buffer in memory over to the SAI for audio playback, using an external DAC. This configuration is based on either other tutorials or the reference manual, but it always throws a User Error flag and calls the DMA's IRQ handler, right after the HAL_DMAEx_List_Start_IT() call (whether done on its own after the necessary configuration, or as part of HAL_SAI_Transmit_DMA()). Even with some changes, it always yields the same results. The only one that seemed to have any effect was setting the Transfer Event mode to trigger the TC flag for each linked list item, which confirmed that a transfer might have been completed, despite the error flag.I have also seen GPDMA being configured with circular, using both Standard Request Mode and a Linked List, but haven't gotten any success out of that myself (with even TC flag not being raised).In case it causes any comp

Hi guy I want to use Nucleo h755zi-q to sent modbus TCP/IP but I have a little time and I'm a beginner. I watched some GitHub but I don't understand. Some one can help me pls 

I am currently performing the bring-up of a custom PCBA using the STM32H755ZIT3.My design is intended to use the Internal LDO only, bypassing the SMPS to reduce component count (i.e. one less inductor in my layout).Here's few details about the MCU power section of my SCH (also, please check attached capture):SMPS Pins: As per the Reference Manual for "LDO-only" mode, I have grounded VFBBSMPS, VSSSMPS and VDDSMPS, whereas VLXSMPS is floating.VCORE/VCAP: I have placed the required 2.2uF decoupling capacitors on VCAP_1, VCAP_2, and VCAP_3. No external inductor is present on the layout.What I'm observing is that at power-on, VCORE remains at 0V. Consequently, the target is not detected by the ST-LINK. If I instead "jumpstart" the board by applying an external 1.2V to the VCAP nodes, the MCU becomes reachable via SWD, and I can successfully modify registers. I suspect a conflict between my hardware layout and the factory default reset value of the PWR_CR3