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I found an ADC regression on `STM32H563RG` after upgrading from `STM32Cube FW_H5 v1.5.1` to `v1.6.0`.Setup:- MCU: `STM32H563RG`- Old package: `STM32Cube FW_H5 v1.5.1`- New package: `STM32Cube FW_H5 v1.6.0`- CubeMX: `6.17.0`Symptom:- I sample multiple external channels on `ADC2`, including `ADC2_INP0`.- Before the upgrade, `ADC2_INP0` measured correctly.- After the upgrade, `ADC2_INP0` no longer reflects the actual GPIO input voltage, while the other ADC2 channels still behave correctly.This is not a sampling-time or rank-order issue. The problem follows `ADC2_INP0` specifically.The regression appears to come from a change in the LL helper for Channel 0 GPIO switch control.In older FW_H5 code, `LL_ADC_EnableChannel0_GPIO()` always set `ADC1->OR.OP0`, regardless of the ADC instance passed in.In FW_H5 v1.6.0, that helper was changed to set `ADCx->OR.OP0` instead. On STM32H563, that breaks `ADC2_INP0`.What fixes the problem in my testing is:- still enabling Channel 0 GPIO switch cont
I am using Powerstep01 for stepmotor driving , comminucate with stm32H743 via SPI , and using x-cube-spn3's firmware for testing (IHM03A1_ExampleFor1Motor), but after initial function running , motor can not run. and after reset the power , powerstep01 is alway burned out . below is the schematic , Does someone could help to check what's the issue ? (VS=24V , VCC=3.3V)
I'd like to use a general purpose timer to continuously trigger a rtc timestamp (using H533)Is it possible ?How to map TRGO signal to Timestamp trigger ?(No HAL please, LL or direct register setup).Thanks in advance.
Working with a NUCLEO-L552ZE-Q development board. Requirement is to interface this board to another larger board where all the pinouts on unpopulated footprints for CN11 and CN12 ( the "Morpho" connectors ) can be brought out. Therefore, the posts that stick out the bottom of the board must all match up in height. The Nucleo PCB design files have listed the populated connectors CN7,CN8,CN9,CN10 on this board as CON_SAMTEC_SSW-110-23-X-D_N144_ARD ( pin counts varying of course )With an accurate digital caliper, I measured the posts that stick out of the bottom of this board measure 9.1mm long, taking the thickness of the PCB into consideration.I bought this part ( SSW-110-23-G-D ) from Samtec and saw the post length and post geometry is NOT the same as what is on the board already populated. I measured the posts on this part number. The posts on this specified part number are 10mm long, and also much wi
hi guys , I have been working on a stm32 project like a digital automotive cluster using STM32H7A3ViT6 MCU . I am using the LTDC module to drive the display . now the problem is the mcu dosent run the code on powerup but it ll do when i press the reset button . i have been debugging it for a long time but couldnt find why this happening to this . now since it is automotive the input voltage is at 12v so itll be converted to 5V 5A using a buck converter and then to 3.3 using a LDO , thats how i power my MCU . now the reset circuit and today i removed the capacitor from the circuit and in some boards the issue is solved . and in some boards i removed the whole reset circuit but still no hope in that . mcu has 100nf decoupling capacitors on vcc pins and 2.2uf capacitors in vcap pins . now when i check the vcore voltage i gets 1.08v but after the reset button is pressed i get 1.8 as expected . . i also tried to power the mcu only w
im having trouble displaying my own bitmap what converter should i use to convert a bmp file to array to work with this function
Hi all, I need to use TIM1 CH1 (PK1) as an input-capture pin for a speed sensor in my TouchGFX project. So, I generated the project from TouchGFX and opened the .ioc in CubeIDE, enabled TIM1 for CM7 and set channel1 (PK1). The display does not start correctly (black or freezes) after I debugged it. When I halt the CPU, the call stack shows it is stuck in MT48LC4M32B2_Delay, MX_FMC_Init() and entered bspsdram error handler. I indicated that the generated project uses tim6 for sys_m7 timebase source but I can't use TIM1 right now and don't know what to do.
Hello,I would like to build up an USB-CDC communication which gets the commands from the PC and forwards the messages to CAN. I have choosen a Nucleo-G431RB-C04 board, which have a FDCAN and a USB-FullSpeed inteface also. Do I able to create an USB-CDC for the mentioned board? I have read several different information of the USB interfaces on the Nucleo boards, and I would like to be sure before I will buy the mentioned card.If not, please recommend for me concrete Nucleo board type for this task.Thanks.
Hi, EveryoneI am trying to setup STM32H7R7Z8 XSPI2 in Quad mode for APS6404L-3SQR QSPI PSRAM.The original code is generated from MX v6.116.1 and developed with IDE v2.0.0.HW info:The PSRAM is connected to XSPI2 with NCS, CLK, IO0~3. There is no DQS pin (PSRAM does not support it).The XSPI2 is setup in 133MHz frequency PSRAM supported.APS6404L-3SQR: 133MHz for 32 Bytes Wrapped Burst, 64Mb, 8M x 8bits, pagesize 1024 bytes,SW configuration:/* XSPI2 parameter configuration */ hxspi2.Instance = XSPI2; hxspi2.Init.FifoThresholdByte = 4; hxspi2.Init.MemoryMode = HAL_XSPI_SINGLE_MEM; hxspi2.Init.MemoryType = HAL_XSPI_MEMTYPE_APMEM_16BITS; hxspi2.Init.MemorySize = HAL_XSPI_SIZE_64MB; hxspi2.Init.ChipSelectHighTimeCycle = 2; hxspi2.Init.FreeRunningClock = HAL_XSPI_FREERUNCLK_DISABLE; hxspi2.Init.ClockMode = HAL_XSPI_CLOCK_MODE_0; hxspi2.Init.WrapSize = HAL_XSPI_WRAP_32_BYTES; hxspi2.Init.ClockPrescaler = 0; hxspi2.Init.SampleShifting = HAL_XSPI_SAMPLE_SHIFT_HALFCYCLE; hxspi2.Init.Chi
Hi,MCU - STM32H7 familyMCU package: FW_H7 V1.11.2FreeRTOSEnable Multi-threaded support -> Thread-safe locking strategy "FreeRTOS strategy #4 - Allow lock usage from interrupts"the issue:When I'm writing a file in Flash, I reach the main.c::void Error_Handler(void) while loop. in the stack, I see that the last steps was in newlib_lock_glue.c:void Error_Handler(void)static inline void stm32_lock_acquire(LockingData_t *lock)void __retarget_lock_acquire_recursive(_LOCK_T lock)__fflush_r()_swbuf_r()_putc_r()_fputc_r()After investigation I see that the Error_Handler reached because the lock object reached is limit 2.The lock LockingData_t struct defined in ST file stm32_lock.h (line 255):#define STM32_LOCK_MAX_NESTED_LEVELS 2 /**< Max nesting level of interrupts */typedef struct{uint32_t basepri[STM32_LOCK_MAX_NESTED_LEVELS];uint8_t nesting_level;} LockingData_t;When I'm set the STM32_LOCK_MAX_NESTED_LEVELS to 5, problem solved and I succeed to write the file.But i set it man
HI ALL.I am using MB1549C board with NUCLEO-U5A5ZJ-Q cpu.SD card is connected to SDMMC1 pins 4bit mode.HAL code is generated with CUBE MX.During SD card initialization CMD8 command is sent.I see that after it sent some flags are set which relates to DPSM.But CMD8 does not require data transfer on D0 pin.So DPSM must not be enabled. But I see these flags in STAR register.BUSYD0,DPSMACT,DTIMEOUT.Response is received correctly but why DPSM is enabled and of course timeout error occur becausethere is no and should not be data on D0?Thanks
Hi I am trying to set up hardware SPI using the following. My software SPI works fine, but the hardware SPI doesn't even have a clock signal. /** ****************************************************************************** * @file : main.c * @brief : P7-SPI2: Two bursts, same 6 bytes. Burst1: SW SPI (PE2/PE6). * Burst2: Hardware SPI1 (PA5/PA7). Probe D0=PE2, D1=PE6, D2=PA5, D3=PA7. * HW SPI1: kernel clock per_ck, GPIO before SPI, CSTART errata workaround. ****************************************************************************** */ #include <stdint.h> #define RCC_AHB4ENR (*(volatile uint32_t *)0x580244E0u) #define RCC_APB2ENR (*(volatile uint32_t *)0x580244F0u) #define RCC_D2CCIP1R (*(volatile uint32_t *)0x58024450u) #define GPIOA_MODER (*(volatile uint32_t *)0x58020000u) #define GPIOA_AFRL (*(volatile uint32_t *)0x58020020u) #define GPIOA_ODR (*(volatile uint32_t *)0x58020014u) #define GPIOE_MODER (*(volatile uint32_t *)0x58021000u) #define GPIOE
Hi, I have a custom STM32N6 board where the BOOT0 and BOOT1 pins are tied directly to ground under the BGA with no test points or jumpers. Is there anyway to connect a debugger in this scenario or is my board bricked? Below is what I get when attempting to connect via an ST-Link V3: >STM32_Programmer_CLI.exe -c port=SWD mode=UR -rst ------------------------------------------------------------------- STM32CubeProgrammer v2.21.0 ------------------------------------------------------------------- ST-LINK SN : 003700163431511731343632 ST-LINK FW : V3J17M10 Board : STLINK-V3MINIE Voltage : 3.26V SWD freq : 8000 KHz Connect mode: Under Reset Reset mode : Hardware reset Device ID : 0x486 Revision ID : Rev Z Device name : STM32N6xx Device type : MCU Device CPU : Cortex-M55 BL Version : -- MCU Reset Error: Unable to run MCU! Error: Error code: 32 And this is what I get from the STM32CubeProgrammer GUI: 23:21:41:351 : UR connection mode is defined with the HWrst reset mode 23:21:41:372
Hi everyone,I tried to manage the USAR LIN break detection interrupt using only HAL driver functions but I did not find a way to do that. I had to modify the file stm32f0xx_hal_uasrt.c adding some code to manage the LIN break interrupt.Is there a way to detect the LIN break in my application without modifying the driver code?This is the code I added to the aforementioned HAL driver file:// At the beginning of the file, where other prototypes are placed #if defined (USART_CR2_LINEN) extern void HAL_UART_LINBreakCallback(UART_HandleTypeDef *); #endif //... // Inside function HAL_UART_IRQHandler #if defined (USART_CR2_LINEN) /* UART LIN break has been detected ----------------------------------------*/ if(isrflags & USART_ISR_LBDF) { __HAL_UART_CLEAR_IT(huart, UART_CLEAR_LBDF); /* Call the callback function to signal LIN break detection */ HAL_UART_LINBreakCallback(huart); } #endif /* USART_CR2_LINEN */If the function is currently unavailable, is
Hi, I have created a project in STM32CUBEIDE for STM32U575ZITQ for USB CDC. I am getting an 85 | HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18); | ^~~~~~~~~~~~~~~~~~~ | HAL_PWREx_PVMConfig ../USB/Core/Src/usbd_conf.c:85:68: error: 'PCD_SNG_BUF' undeclared (first use in this function) 85 | HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18); I am following the link below to create the project: https://community.st.com/t5/stm32-mcus/how-to-use-stmicroelectronics-classic-usb-device-middleware-with/ta-p/599274 I have tried with USBX but no result. After that I followed above link to create a USB CDC project. Regards, Abhishek
Hello, We have found that, in an OS context, if two tasks change the configuration of different GPIOs belonging to the same port, then the register can get corrupted due to a RMW race.It seems the RMW operations are not protected:// stm32u5xx_hal_gpio.c :232 tmp = GPIOx->MODER; tmp &= ~(LPGPIO_MODER_MOD0 << position); tmp |= ((pGPIO_Init->Mode & GPIO_MODE_OUTPUT_PP) << position); GPIOx->MODER = tmp;Our solution is as follows:ATOMIC_MODIFY_REG(GPIOx->MODER, (LPGPIO_MODER_MOD0 << position), ((pGPIO_Init->Mode & GPIO_MODE_OUTPUT_PP) << position));Is there any reason why these operations were not atomic in the first place ?Do you see any issue with our solution ?Is there a better way to handle this ?
Hi, I want to go to sleep/stop mode with STM32 and wake on interrupt. After last interrupt it should wait for 10sec and go back to sleep. But I see an edge case where interrupt could occur just before going to sleep/stop mode.How do I handle interrupt just before going to sleep/stop mode (cancel sleep/stop mode)?Basically force WAKE from sleep/stop mode even if STM32 is not yet in sleep/stop mode? #define STAY_WAKE_FOR_TICK 10000 static volatile uint32_t GoToSleepAfterTick; void main(void) { //... while (1) { HAL_SuspendTick(); HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_STOPENTRY_WFI); HAL_ResumeTick(); while (HAL_GetTick() < GoToSleepAfterTick) { //... } // interupt could occure here??? } } void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) { if (GPIO_Pin == CALL_Pin) { GoToSleepAfterTick = HAL_GetTick() + STAY_WAKE_FOR_TICK; } }
Hello Team,We have faced the Firmware ( hex file ) theft by Reverse engineering , Our competitor 2 Times. Yes, Two times , while RDP1 is set. We do not have contarct Manufacture in our whole process.Even Reading / Comparing intertlock of 96 bit UID failed.MCU is STM32F303.Can any one suggest a very high Strong Method which ensue complete guarantee for Firmware Protection from any threats. ?It seems STM32 is so famous that , its weak-leak point also Known.Getting Assembly / might be "C" code from Hex file looks Staright forward to crackers.
May be somebody know whats happen with .cproject, .project files after reinstallation STM32CubeMX, STM32CubeIDE, last version and after some other?! Project (at screen behined) is in the folders TochGFX. Told that need plagin ...mcu.ide2.7... from folder CubeIDE, but if i am set it version than that its files the same i.e not change.I am tried set in propertis its file "open cross STM32CubeIDE " but in CubeIDE open only .cproject or project (single) files but not all of the project as early.Thanks.
I downloaded the package from here: https://www.st.com/en/embedded-software/x-cube-azrtos-h7.htmlIt is not yet available on MX when searching for example code. Anyways, so I am able to run the UX_Device_Recording which is cool. I notice that it uses the onboard mic, which is AudioInInit.Device = AUDIO_IN_DEVICE_DIGITAL_MIC; But I want to use the analog microphone that comes with the headset - available in CN17. So I change it to AudioInInit.Device = AUDIO_IN_DEVICE_ANALOG_MIC;And now it's giving a static noise, but no mic input is captured. Any idea why?
I need support to get IAP over SPI.I've esp connected to my stm32u5 over SPI. Stm is slave and ESP is master. For stm I've created project using stmcube by entering MCU part number.Now here my question is1. Do I need to develop bootloader code to achieve this.2. How do I customise bootloader code.3. STM boot pin is connected to ESP. do I need to control this?4. Hwi do I adjust my memory or linker file
Hi, I'm building a medical device that will use an STM32 MCU and requires secure boot and secure firmware updates (over USB-C preferably). I have little experience with implementing secure bootloaders, and am looking for a solution that could allow me to get secure boot working out-of-the-box with minimal setup. I've seen that SBSFU offers example projects for secure boot on some MCUs, while MCUboot is also available for some others. It also looks like the STM32U5 series supports their own secure firmware updates based on AN4992. What's the difference between all of these solutions? Out of all the solutions ST offers for secure boot, which ones are the newest/recommended and easiest to get set up with? Because I'm looking for a low-cost MCU, I've identified the STM32L471, STM32L476, and STM32U575 as potential candidates that could support secure boot, but I'm lost as to how to actually set it up or what software solution to use. I'd love to hear anyone else's suggestions for other MCUs
In STM32Cube_FW_H7RS_V1.3.0, file Projects/STM32H7S78-DK/Applications/ROT/OEMiROT_Boot/Inc/flash_layout.h:The macro OEMIROT_LOAD_AND_RUN has 3 possible settings, and we're using the NO_LOAD_AND_RUN to execute code (in external flash) in place.However, we're also using external RAM in our application, and this must be enabled in the bootloader, as the app attempts to initialise values in external RAM at startup.Unfortunately, the external RAM is only initialised if you select LOAD_AND_RUN_EXT_RAM.There is a workaround: in boot_hal.c and low_level_ext_ram.c, replace every instance (3 in each file) of:#if (OEMIROT_LOAD_AND_RUN == LOAD_AND_RUN_EXT_RAM)...with something like:#if 1// (OEMIROT_LOAD_AND_RUN == LOAD_AND_RUN_EXT_RAM)For the future, would you consider having an option to run in place and enable external RAM?Thank you.
ST moderator has edited this post to be compliant with the community rules. In next time please use </> button to paste your code. Thank you for your undersranding. Hello collegues. LL library. Can you help with RTC domain in STM32C031T6. Problem is that, RTC start and counting, I set alarm A evry 1s. This wokrs fine. I'm counting moreless about 30min. After push the pin RESET, RTC starts counting from 0, I want to continue counting ? Initialization code below: void MX_RTC_Init(void) { /* USER CODE BEGIN RTC_Init 0 */ /* USER CODE END RTC_Init 0 */ LL_RTC_InitTypeDef RTC_InitStruct = {0}; LL_RTC_TimeTypeDef RTC_TimeStruct = {0}; LL_RTC_DateTypeDef RTC_DateStruct = {0}; LL_RTC_AlarmTypeDef RTC_AlarmStruct = {0}; if(LL_RCC_GetRTCClockSource() != LL_RCC_RTC_CLKSOURCE_LSE) { FlagStatus pwrclkchanged = RESET; if (LL_APB1_GRP1_IsEnabledClock (LL_APB1_GRP1_PERIPH_PWR) != 1U) { /* Enables the PWR Clock and Enables access to the backup domain */ LL_APB1_GRP1_Enabl
We had:An STM32H7Sx with an external flash on one XSPI port, and an external RAM on the other;Both external devices memory mapped;The core clock running at 380 MHz.XPI1 mapped to port 2, and vice versa.XSPI clock running at 200 MHz.Using our adapted version of ST's secure bootloader, we erased sectors of the external flash, but found that this consistently caused corruption in the external RAM, and it also looked like the erases weren't fully successful either.The driver code which carried out the erases removed the flash from the memory map before each operation, and added it back afterwards.We found that to avoid the RAM corruption, it was necessary to also remove the RAM from the memory map before the flash erase operation, and add it back afterwards.We had assumed that the two buses were independent (despite meeting in the XSPIM), so this result was unexpected; and it's still not clear to us why an erase operation in the flash would cause corruption in the RAM.Also, this probl
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