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Hi,I am trying to figure out what is the easiest way to extend the object detection app provided in https://github.com/STMicroelectronics/STM32N6-GettingStarted-ObjectDetection/In particular, I would like to add one of the many N6 supported libraries such as threadx.Lacking the ioc file, I am currently updating by hand the cubeIDE cproject file with the path to the threadx distribution I imported from the N6 examples repository but I wonder if there isn't a better way.Streamlining or at least providing one example on how to integrate any of the provided supporting libraries would be very helpful. Can anyone point me to any documentation I can use as a reference?

Hello, I have a nucleo board with STM32H563. I am trying to make a simple application that will take two ADC measurements with regular conversions. I've been going through the refference manual(RM0481 Rev4) and in the ADC overrun chapter on page 1072, It is stated that there is a three stage ADC_DR FIFO, but not much more about it is explained.  My question is: If i create a sequence of 2 channels and trigger them, would I be able to read the DR register twice with value of channel 1 and 2(with an assumption I am using channels 1 and 2), or will the value of channel 1 be overrun by channel 2 value immediately.I don't want to read the data in an ISR after one conversion is completed, I would liek to read them both together after they are both completed.And I don't need a workaround, I am trying to get to know what this ADC can really do. Thanks, Ivan

Hi I have been looking into the boot process for stm32n6 and was unclear about a few things. For booting from external flash the steps are as follows 1. build your app's bin file. The app should be built with the vector table at the start and the linker script should have a base address 0x341804002. Add the header using the signing tool3. Upload the code to flash using extloaderThis is correct right? The second step is what confuses me. I use the command STM32_SigningTool_CLI -bin Project.bin -nk -of 0x80000000 -t fsbl -o Project-trusted.bin -hv 2.3 -dump Project-trusted.binas indicated in https://github.com/STMicroelectronics/STM32CubeN6/tree/main/Projects/NUCLEO-N657X0-Q/Templates/Template. I did a hexdump on the generated Project-trusted.bin file and I have the following questions regarding it 1. The base header and padding header have a combined length of 576 bytes (0x240). After that the app starts. This doesn't line up with the linker script or UM323

Hi everyone, I am facing an issue with CAN communication on STM32F446ZCT6, where the CAN controller frequently enters the Bus-Off state. Hardware Details MCU: STM32F446ZCT6 CAN Transceiver: (TJA1042T) I am working with CAN communication on STM32F446ZCT6, and the CAN controller is frequently going into the Bus-Off state. I am using the HSI clock, configured from 8 MHz to 42 MHz, with the CAN clock derived from APB1 = 42 MHz I have enabled Auto Bus-Off Management and tested multiple bitrates (500 kbps, 250 kbps, and 125 kbps), but the issue still occurs. I see bit errors and acknowledgment errors, which eventually cause Bus-Off.Can you please help me to solve this issue.

I installed the latest STM32Cube AI Studio along with STM32CubeMX 6.16.0, STM32CubeProgrammer 2.21.0, and ST Edge AI Core.CubeMX has STM32CubeU5 Firmware Package V1.8.0 / 04-June-2025 installed.All attempts to run a neural network end with: ../../Middlewares/ST/AI/Misc/Inc/ai_device_adaptor.h:624:8: error: unknown type name 'UART_HandleTypeDef' When AI Studio generates a project from any neural network, it disables the UART in stm32u5xx_hal_conf.h.Even if I uncomment the #define of HAL_UART_MODULE_ENABLED, the app cannot be compiled because the stm32u5xx_hal_uart.h header was never generated.If I click on the little gear at the upper right in Cube AI Studio, it shows me that the COM5 LPUART1 is configured.So I'm stuck -- Cube AI Studio cannot be used with the stm32u5xx devices.Any advice?Thanks! --Mike  

During Startup,after MX_NVIC_Init();when it jumps into /* USER CODE BEGIN 2 */The code is interrupted by TIMx_UP_M1_IRQHandler() in its routine, (void)R3_2_TIMx_UP_IRQHandler(&PWM_Handle_M1);the code gets stuck at /* We can not change OPAMP source if ADC acquisition is ongoing (Dual motor with internal opamp use case) */ while (0x0u != pHandle->pParams_str->ADCDataReg1[pHandle->_Super.Sector]->JSQR) { /* Nothing to do */ }I'm not able to understand why this is happening. I have not initialized any custom ADC (RCM) yet.Everything that has run, until that point is generated code only.With some research I have understood that the TIM1 update routine is infinitely waiting for the ADC(Injected Conversion) to finish. Is this some kind of race condition ?This doesn't happen always on every boot/startup. Only randomly, some times. If it does not crash at this point, I have not observed it to crash at a later point of time.Am I suppose

Hi everyone,I'm trying to interface a DVP camera (like OV5640) with the STM32F469I-DISC0 board using the DCMI peripheral in 8-bit parallel mode.What I have:- The camera is configured and outputs data correctly via I2C.- I'm using bare-metal code (no HAL or CubeMX), and SDRAM + USART debug are working.- DCMI pins are being mapped as per the STM32F469 reference manual.- I verified that I can access and remap the following DCMI pins:- D0 – available- D1 – available- D2 – available- D3 – available- D4 – not available(e.g., PE5)- D5 – available - D6 – available- D7 – available- HSYNC, VSYNC, PCLK – availableProblem:- DCMI_D4 is not brought out on any connector** on the DISC0 board. It's internally routed to LCD or unused.- I checked the board schematic and there’s no easy way to solder to it either.My questions:1. Can DCMI work with 7-bit data (skipping D4)? Will DCMI capture still be valid if D4 always reads 0?2. Is there any known workaround for the missing D4 line (e.g., using

Embedded ST-Link via CN1 USB is working fine. I followed the direction as below when external ST-Link v2 was tried on STM32L552ZET6Q Nucleo-144. The error message "No Target" was displayed on STM32CubeIDE with external ST-Link. Could you provide me with any advice?    

Hello everyone,I am working on a custom board based on the STM32U575RGT6 (1MB Flash). I am encountering a hard fault (SecureFault) during the initialization of the Non-Secure application after integrating the SBSFU.Context:Hardware: Custom board with STM32U575RGT6.Initial Project: A working application using TrustZone active + FreeRTOS (generated via CubeMX). The Option Bytes were set to a default 50/50 split (Secure/Non-Secure).Goal: Implement a Secure Boot / Firmware Update mechanism.What I did:I used the ST example for B-U585I-IOT02A as a reference.I integrated SBSFU_Boot and SBSFU_Loader into my project folder.I adapted the linker scripts (.ld), postbuild.sh, and flash_layout.h to match the 1MB Flash size of the U575RGT6 (vs 2MB on the B-U585I).In my original application, I replaced the .ld files and startup_xx.s files with those provided in the SBSFU_Appli example.Configur

Does ST maintain any automated tests for ST development boards and Zephyr?  If so, where may I find more details about the hardware used and test coverage?

This release introduces the latest version of RTEdbg, a high-performance toolkit engineered for real-time embedded system analysis and debugging. The latest update streamlines event visualization via VCD viewers and introduces FreeRTOS trace integration, alongside several core enhancements.Unlike traditional logging and tracing solutions (such as Tracealyzer or SystemView), RTEdbg provides deep runtime insights with a minimal footprint. Its logging functions are significantly faster than commercial alternatives and consume substantially less stack space, making it the ideal choice for both resource-constrained devices and complex, large-scale RTOS-based systems.Relying solely on classical debuggers often feels like "flying blind" when managing intricate timing and RTOS scheduling. RTEdbg bridges this gap by providing:VCD-based visualization for synchronized event and data tracking.RTOS trace support for better scheduling visibility.Enhanced trace macros allowing you to log any data typ

I have been looking at the CRA Q&A and was wondering what you you are meaning with the reporting of security incidents 2026-12-11. Do you mean the reporting according to article 14 that enters into force 2026-09-11?

Not sure that I have the latest version of the HAL but I used two ip address for the ETH MAC and tried to enable both in the L3 filter.But I could not get any data to the second interface. with the filter turned on-Looking more closely on the HAL_ETHEx_SetL3FilterConfig I found what can only be a copy paste mistake.Writing the destination address for IPv4 was mede to the MACL3A0R1R register instead of the expected: MACL3A1R1RMight be fixed in newer version but using two IP-address perhaps is a bit unusual.  

Hello, I need to have D-Cache enabled to improve performance of FMC external SDRAM (it's >3x slower without D-Cache enabled). I also want to use I2S for audio. But with D-Cache enabled, I don't get any data from ADC. What can I do to use I2S with D-Cache enabled?

Hi.  I have a newly purchased NUCLEO-U575ZI-Q.  I followed the instructions here to install the toolchain on Windows 11:https://www.st.com/en/evaluation-tools/nucleo-u575zi-q.html#documentationhttps://wiki.st.com/stm32mcu/wiki/STM32StepByStep:Step1_Tools_installationAfter one unsuccessful attempt where I chose my own installation folders, I uninstalled everything and took the defaults.What a mess!  The default installation folders are spread between AppData, Program Files, and C:\ST.  But OK, if that's what it takes.Unfortunately, I got to step 5 and found that the instructions diverge from reality.They never said to click Finish to complete the Import Projects dialog.  And there is no way to select the project they mention from it.  But if I click Finish, then a tiny icon appears on the upper left.  If I click it, then there is a Project Explorer window.The next step is:My IDE has no Debug icon (the the little yellow blob on its lower left).  Bu

Continuation of this thread. Hello,  I've wired SDRAM (AS4C4M16SA-5TCN)  with STM32H730ZBT. Connection works, I can read/write data, but every other byte.  Let's start with array declaration: uint8_t *externalRAM = (uint8_t*)0xC0000000; /* USER CODE END PV */ Then I'm trying to write some bytes to this array, ie: externalRAM[0] = 0xAA; externalRAM[1] = 0xAA; externalRAM[2] = 0xAA; externalRAM[3] = 0xAA;   And to read it: uint8_t test[4]; test[0] = externalRAM[0]; test[1] = externalRAM[1]; test[2] = externalRAM[2]; test[3] = externalRAM[3]; And this is the result: Sometimes test[1] has 0xAA too, but mostly it's 0. I've tried to lower FMC frequency or change memory timings. What does this look like?

Hello,I am experimenting with X-Cube-AI (v10.2.0) in STM32CubeMX(v6.16.1). I noted that the version of the ST Edge AI Core in this case is v2.2.0. Moreover, this makes that the Embedded Interface is the legacy one, instead of the the newest ST-AI. I wonder if there are plans to update X-Cube-AI so it uses the latest version of ST Edge AI (v3.0.0), and uses the latest the ST-AI interface.Thanks.

Dear ST Community,We are working with the STM32MP257F-EV1 evaluation board and using the Yocto Distribution Package for our software stack.Our intended boot sequence is:Boot starts from the Cortex-M33 core.The M33 firmware is responsible for triggering the boot of the Cortex-A35 core.We would like to confirm:Is this boot flow supported on the STM32MP25x platform?If yes, could you please share the recommended procedure or reference steps to implement this?Any guidance or official documentation links would be greatly appreciated.Thanks and Regards,Ishan

Hello, I have a query about how HAL_UART_Receive_DMA and HAL_UARTEx_ReceiveToIdle_DMA work?For my application there is a varying payload size, so I am wondering how would I trigger the HAL_UART_Receive_DMA(&huart3, rx_buffer, 4096, 0xFFFF); interupt? As from my understanding it would be waiting for all 4096 bytes of data which won't arrive unless a different frame was sent.Whereas  HAL_UARTEx_ReceiveToIdle_DMA(&huart3, rx_buffer, 4096); triggers once the serial port stops communicating, however it stores the received data in 512 byte chunks, which has proven difficult to access when generating a LUT from the rx_buffer.If anyone can shed some insight over how these interrupts work? And how to make them applicable for a variable payload would be great.

I have implemented a USB Audio 2.0 device that receives audio from the PC host (speaker endpoint) and loops it back (microphone endpoint). The PC correctly recognizes the device, and audio playback works, but I'm experiencing unexpected low-frequency noise.Specific symptom: When playing a pure 350Hz sine wave from the PC, the device receives not only the sine wave but also significant noise content from 0Hz to 350Hz. This noise is audible in the loopback audio sent back to the host.The audio data flows through a simple memory copy without any DSP processing:ux_utility_memory_copy(write_buffer, read_buffer, copy_len); ux_device_class_audio_write_frame_commit(g_mic_stream, copy_len);I also perform FFT analysis for visualization (TouchGFX), and the spectrum confirms the low-frequency noise is present in the received audio data itself, not introduced by my processing.I have tried to disable the microphone endpoint and keep just the speaker endpoint but the issue persists.Any guidance on di

I am using NUCLEO-U083RC with X-NUCLEO-IKS4A1. I read the data from LIS2DUXS12 which is on X-NUCLEO-IKS4A1. The accelerometer data is in 8 registers. OUT_X_L, OUT_X_H, OUT_Y_L, OUT_Y_H, OUT_Z_L, OUT_Z_H.I am trying to understand the instructions in the document AN5909 page 23. The example shows:Get the raw data from the sensor:OUT_X_L: 61hOUT_X_H: FDhOUT_Y_L: 73hOUT_Y_H: 00hOUT_Z_L: F0hOUT_Z_H: 42hDo the register concatenation (useful data on 14 bits, last 2 bits must be ignored):(OUT_X_H << 8) + (OUT_X_L & 11111100b) = FD60h [-672 in two’s complement](OUT_Y_H << 8) + (OUT_Y_L & 11111100b) = 0070h [+112 in two’s complement](OUT_Z_H << 8) + (OUT_Z_L & 11111100b) = 42F0h [+17136 in two’s complement]Apply the sensitivity and obtain the value in mg (0.061 mg/LSB at full scale ±2 g):X: -672 * 0.061 = -41 mgY: +112 * 0.061 = +7 mgZ: +17136 * 0.061 = +1045 mgI have the following question: why is the two's compliment for FD60h ca

what am i doing wrong?

Hi Team,We I have shortlisted the STM32U535RET6QTR microcontroller for our microwave oven control panel. The MCU includes an integrated Touch Sensing Controller (TSC), and our design requires 8 capacitive touch keys.Before finalizing the component selection, we require clarification on the following points to ensure compliance with home‑appliance safety and EMC standards:1.Is the STM32U535RET6QTR suitable for microwave‑oven capacitive‑touch applications?2.Does ST provide any dedicated capacitive‑touch sensing IC, apart from the built‑in TSC in STM32 MCUs?3.What are the advantages of using STM32U535RET6QTR (with integrated TSC) compared to a dedicated touch‑sensing chip?4.If we use the integrated TSC in STM32U535RET6QTR, what hardware challenges may occur?5.What software‑related challenges can arise with the integrated TSC?6.Can STM32U535RET6QTR meet home‑appliance certification requirements such asIEC 60335‑1 / IEC 60730‑1 Class‑B?7.For an 8‑key capacitive touch panel, what does ST rec

Hi.I want to use NUCLEO-WL55JC with 32MHz crystal, not TCXO. So i do following steps according to UM2592(User manual of STM32WL Nucleo-64 board)No C30 and no C38 as those capacitors are integrated into the STM32WL MCU.SB20 OFF in order not to supply the TCXOC31 OFF in order not to have a 32 MHz signal coming from the TCXOR39 and R40 ON to connect the X3 crystal to the STM32WL MCU I use LoraWAN_end_node project in STM32Cube_FW_WL_V1.4.0.So i do following steps in configuration in CubeMX (also attach clock configuration)Select HSE as Crsytal/Ceramic Resonator instead of TCXOIn stm32wlxx_nucleo_radio.c, BSP_RADIO_IsTCXO function returns RADIO_CONF_TCXO_NOT_SUPPORTED instead of RADIO_CONF_TCXO_SUPPORTED. But after that, NUCLEO board give me message MAC txTimeOut instead of success tx process. While i use TCXO, there is no problem to send tx and also connect to LoraWAN. What can i do to use standard crsytal instead of TCXO? Be

Hello,I am testing a demo of my TSD TSS012004A-AD board.It has 36KB internal RAm and 256KB internal FLASH.My configuration on touchGFX like below:And my linker result is like below:As you can see there is still %55 empty on my internal FLASH and very little SPI_FLASH is used, I would like to use only internal memory. Why this 13388B is not used on FLASH, even I force to use internal flash section on touchGFX settings. Thank you,