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Memory Mapped Mode for NOR Flash and Making External Loader for STM32F769AI- W25Q01JV (Winbond W25Q01JV- QSPI NOR FLASH).

Forum|Forum|4 years ago
March 10, 2022
20 replies
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Hi Community,

I worked on project W25Q01JV (QSPI NOR FLASH) interfacing with STM32F769AI . I have fully functional project with Erase, Read and Write.

Now I am trying to do following tasks :

1) Configuring into Memory Mapped Mode.

2) Implementing an External Loader for my STM32F769AI-W25Q01JV.

I have referred some technical details to solve them, but didn't get clarity. So, to solve them I need some support from community.

Thank you.

This topic has been closed for replies.

Best answer by Tesla DeLorean

Memory Mapped, you're just configuring the system with the command you're using to do a Quad Read, w/32-bit addressing. You're just providing the system with a command template, and it uses that over and over within the 0x90000000 address space, it will use the parts 0 thru 0x7FFFFFF (128MB) addressing.

Once you switch into this mode, you can't use the direct commanding any more until your reset/restart the QSPI connection.

You have these in SOIC16W?

Bowman32

ST Employee

Hi,

I think this guide could help you: How to create an external QSPI loader MOOC

Bouraoui

Tesla DeLoreanBest answer

Guru

Memory Mapped, you're just configuring the system with the command you're using to do a Quad Read, w/32-bit addressing. You're just providing the system with a command template, and it uses that over and over within the 0x90000000 address space, it will use the parts 0 thru 0x7FFFFFF (128MB) addressing.

Once you switch into this mode, you can't use the direct commanding any more until your reset/restart the QSPI connection.

You have these in SOIC16W?

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Tesla DeLorean

Guru

SOIC16W would be W25Q01JVSFIQ

Dual Die

PB2:AF9:CLK

PB10:AF9:NCS

PD11:AF9:D0

PD12:AF9:D1

PE2:AF9:D2

PA1:AF9:D3

https://www.winbond.com/resource-files/W25Q01JV%20SPI%20RevC%2005032021%20Plus%20dummy.pdf

https://github.com/cturvey/stm32extldr/blob/main/f7_w25q01/CLIVEONE-W25Q01_STM32F7XX-PB2-PB10-PD11-PD12-PE2-PA1.stldr

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VinsAuthor

Associate III

@Community member Thank you for your replay.

I have another query regarding address.

0x90000000 Macronix memory's starting address.

0x00000000 Windbond memory's starting address.

Is 0x90000000 address is fixed for any/every external memories? Or it varies according to the different nor flashes? As in the case of Winbond NOR Flash.

I think according to that We should change in the dev_info.c.

Tesla DeLorean

Guru

Ok, so the QSPI memory appears within the STM32's address space at 0x90000000, as a 256MB window, shrunk to match the "Size" shift parameter. You'll get Hard Faults outside of the decode region.

The memory devices don't know where they are within the MCU's address space, and the addresses passed to the QSPI device is ZERO based, ie the Address you pass to the COMMAND is basically (Address & 0x0FFFFFFF), you have to watch this with addresses passed via the external loader interface as ST is sometimes inconsistent, or assumes it should be 0x90000000 based. The upper bits will confuse the memory chip.

The Memory Mapped mode does this masking in hardware, either masking off the top 4-bits, or using the "Size" shift parameter you used to configure the QSPI Peripheral.

Mouser looks to have some of the W25Q01JVSFIQ, so I've ordered an handful of those, which I can fixture.

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VinsAuthor

Associate III

@Community member it means even though staring address of the memory is 0x00000000, I should use 0x90000000 as device's starting address?

JohnS

Associate II

I'm also working on a project with the W25Q01JV, could you please share the code of the "driver" (.c and .h files) to communicate with the QSPI? I'm debugging my code and it would be amazing to have working code.

Tesla DeLorean

Guru

What's your pinning / platform?

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JohnS

Associate II

It's an F7 with the pins set to PB2-PB6-PD11-PD12-PE2-PD13 I see you have that external loader already: https://github.com/cturvey/stm32extldr/tree/main/f7_w25q01

Very cool. Thank you so much for building these resources for the community.

My question was more to @Vins if he could share his implementation because I have not yet implemented the memory mapped mode. I've looked at examples of how to do it with the QSPI chips ST supports, but I've not seen an example with these Winbond chips.

Any tips would be appreciated, I see your (@Community member ) comment above and that context is helpful. I'm going to try to implement memory mapped mode tomorrow because as I understand it that is necessary to execute the code placed with the external loader, is that correct?

Thank you all for your time, I hope this is helpful to others as well in the thread of the original question.

VinsAuthor

Associate III

Hi @Community member I am working on creating STLDR means External Loader. I am getting stldr as in attached image.

Tesla DeLorean

Guru

The StorageInfo structure doesn't look correct, or perhaps exported incorrectly

This is the loader I have per your pins

EDIT:This one is your pins

https://github.com/cturvey/stm32extldr/blob/main/f7_w25q01/CLIVEONE-W25Q01_STM32F7XX-PB2-PB10-PD11-PD12-PE2-PA1.stldr

This one used PB6 for NCS rather than PB10

https://github.com/cturvey/stm32extldr/blob/main/f7_w25q01/CLIVEONE-W25Q01_STM32F7XX-PB2-PB6-PD11-PD12-PE2-PA1.stldr

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