Which reset pin to use - STM32F407VGT vs stm32f4_Discovery

[Zainka]

Posted on November 30, 2013 at 13:57

Hi

In a new layout, my first with STM32F4 ARM, I have done as the refference manual for this family tells me to do when I where to connect the SWD/JTAG . I used PB4 for Reset (<b>nJTRST</b>) . However, I now see that the discovery board does not at all connect this pin to the built in stlink debugger. It uses the , well lets call it the main-reset pin, <b>nRST</b> on pad 14 for the mentioned chip. Since I now have problems with stability when connecting my design to stlink I wonder if this could cause it? I have not yet tried to use NRST in stead but even if that solves my problems I feel that I need to know which pin is correct to be used? Talking aboute problems, I am able to once in a time connect the target but I must have a breakpoint in startup entry, cause I will never run to main. Stepping through startup shows me that the debugger looses connection when startup is initializing memory (i.e. the second iteration of .CopyDataInit). And thats it. I then have big troubles reconnecting next time. I find this dificult to understand cause I have developed the sw on the discovery board before porting the code that runs well on discovery. The only thing done when porting, since the layout on my board is pretty similar is that I have moved a few portpins. The startup is the same and the chip is the same. The problems occoures while the chip is running on internal clock.. The only thing.... among all others, that comes to my mind and which could cause this problem is the reset issue, maybe and powersupply. The powersupply seems fine though after checking. Thanks in advance #swd-stm32-jtag-reset-njtrst-nrst

[Tesla DeLorean]

Posted on November 30, 2013 at 14:29

NJTRST does not reset the chip, just portions of the JTAG chain/circuit. The processor needs to be reset with NRST to properly gain control of it. A typical 20-pin JTAG connector has signals for BOTH.

For SWD the use of SWDIO, SWCLK, SWO and NRST is recommend. As for what your code does you will need to analyze what memory it is touching, and if any pins are being reconfigured. SWD connectivity can be impacted by low power modes, WFI loops, DMA, and pin changes. If the processor is Hard Faulting, examine why that might be. You might also want to review your hardware, capacitors on VCAP pins, digital and analogue supplies, etc. You'll need to be more specific about what exactly you did change.

[Zainka]

Posted on December 15, 2013 at 11:21

Some times since you gave me tha answer. Thanks anyway.

My missunderstanding of the datasheet. However, it did not solve the unstability issue. It behaevd the same way afterthe rst fix. To make a long story short, after a lot of investigation and measurments i did a periodically upgrade of my dev-environment. In short, I upgraded em:blocks to version 1.4. (used 1.21 earlier) No need to tell my shock and anger when after this upgrade everything went smothly. Lesson learned. ''I am not always the cause for trouble...'' Good to know. Best regards Vidar