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Title: Hello,I am investigating BootROM behavior on an STM32N6570-DK.My expectation is based on the STM32N6 BootROM documentation and errata:- PG10 is used as BootFailedn in blocking failure conditions.<sup class="chatgpt-doc-sup"><span title="ES0620-STM32N6_Rev4.pdf, page 7" /></sup>- There is a known erratum: “PG10 (BootFailedn) signal not maintained at 1 during blocking failure”, with no workaround listed.<sup class="chatgpt-doc-sup"><span title="ES0620-STM32N6_Rev4.pdf, page 7" /></sup>Observed behavior on my board:- If the content of the OctaFlash is erased, I do not receive the expected serial BootFail-related output on PG10 / USART5_TX.- Measuring PG10 with an oscilloscope, I see a ~4.3 MHz square wave instead.- I observe the same square wave again after setting BOOT1=1 and BOOT0=0 and then resetting the board.Additional context:- I found guidance that Development Boot mode can be relevant for programming/erasing external flash on STM32N6570-D

Hi,I have custom PCB with STM32WB5MMG, which has STM32WB55VGY. I want to update FUS and software stuck and I would like to confirm which start address is the correct one. Should it be the one from the column STM32WB5xxG(1M) (as the chip is STM32WB5MMG) or the one from column STM32WB5xxY(640k) (as the MCU is STM32WB55VGY)?  

Hello everyone,I am trying to use TLS 1.3 with Mbed TLS on an STM32H573 through the Secure Manager’s Global PSA API.At the moment, I am seeing the following errors: psa_sign_hash() / psa_sign_message()→ PSA_ERROR_NOT_PERMITTEDpsa_generate_key() / psa_import_key()→ PSA_ERROR_GENERIC_ERRORThe persistent ECC keys are provisioned with the required signing permissions, and both the Secure Manager and the non-secure application start correctly.Some TLS 1.3 HKDF operations had to be implemented locally because the PSA Crypto API version in use is 1.0 and does not provide separate HKDF-Extract and HKDF-Expand algorithms.My questions are:Are persistent ECC keys supported with psa_sign_hash() through the Global PSA API? Does the Secure Manager support volatile keys with psa_generate_key() and psa_import_key()? Are additional permissions or a Secure Module required? Is there a support matrix or an official TLS 1.3 example for this setup? Does anyone have experience with Secure Manager and MbedTLS

Hi,I recently erased the external flash of my STM32N6570-DK board while experimenting with STM32CubeProgrammer, and I'd like to restore the original out-of-the-box demo (the multi-application menu demo with image classification / pose estimation / face detection etc.).I found the "n6-ai-demos" entry under Tools & Software on the product page, but clicking "Get latest" leads to a 404 page not found error.Could someone please:Confirm whether this link is currently broken on ST's side, or Share a direct working link / attach the "STM32N6570-DK Out-of-the-box demo binary" fileBoard info:Board: STM32N6570-DK, Revision ID Rev Z Device ID: 0x486Thanks in advance!  

Hi,We are currently using the STM32H563ZIT6 microcontroller in our project. We would like to obtain the FIT (Failure In Time) / reliability data for this device for our reliability and FMECA analysis.Please share the latest available reliability data or the relevant ST document/reference.Thank you for your support.Best regards,Geetha Thota.

Does ST still produce the IMU LSM6DSVDTR and what is the different between LSM6DSVTR and LSM6DSVDTR?

Hello everyone.My fight with STM32H7R7 continues.I'm trying to get the simplest example of triggering the EXTI interrupt on an STM32H7R7I8T6. I've run this thousands of times on other H7 series MCUs and never had any problems. I have a button and an LED connected to the MCU as shown in the diagram.Pin PC11 configured as below:/*Configure GPIO pin : PC11 */GPIO_InitStruct.Pin = GPIO_PIN_11;GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;GPIO_InitStruct.Pull = GPIO_NOPULL;HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);/* EXTI interrupt init*/HAL_NVIC_SetPriority(EXTI11_IRQn, 0, 0);HAL_NVIC_EnableIRQ(EXTI11_IRQn); I added to the Callback code as always:/* USER CODE BEGIN 4 */void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin){    if(GPIO_Pin == GPIO_PIN_11)    {        HAL_GPIO_TogglePin(GPIOA, GPIO_PIN_12);    }}/* USER CODE END 4 */ Optionally, I also added lines in the Callback itself:/* USER CODE BEGIN 4 */void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin){ if(GPIO_Pin == GPIO_PIN_11) { HAL_GPIO_Togg

Hi guys,  This is my first topic and I hope this is the right section.I’m trying to connect the EVLSPIN32G0B2 evaluation board to the ST.LINK/V2 program tool connected to PC via USB.When I click on Connect on the STM32CubeProgrammer I get the error “ST-LINK error (DEV_CONNECT_ERR)”. Of course, when I do this I have the evaluation board connected to another usb port in order to supply the micro. Why doesn’t it works? I can’t find my error. I have another question: which is the program to be loaded on the EVLSPIN32G0B2 to make it working with Motor Pilor and be able to configure my brushless motor ? Thank youStefano EDIT:I didn’t mentioned that the ST-LINK is connected to the EVLSPIN32G0B2 via a cable coded ARM-JTAB-20-10 bought on Mouser Electronic’s site and it is connected to the RESERVED connector on the EVLSPIN32G0B2 board.

Hello ST Community,We are currently using the x-cube-n6-ai-face-landmarks pipeline on the STM32N6570-DK. We now want to extend the BlazeFace stage so that it can detect additional DMS-related classes along with face detection. The classes we are interested in are:Phone, Seatbelt, Smoking, Face, Drinking. At present, the BlazeFace model used in the ST face-landmark project is a single-class face detector, and we could not find a public ST training pipeline for retraining or extending this specific BlazeFace model. Is there any ST example or reference repository for training BlazeFace on:WIDER FACE, custom datasets, or custom multi-class datasets?Our goal is ideally to reduce the number of separate detection models while keeping the existing face-landmark pipeline functional on STM32N6570-DK.Any guidance on the recommended training flow, supported model architecture, or available reference code would be very helpful.

Hello ST Community,I am attempting to run the LoRaWAN_End_Node_LBM example project from the STM32CubeWL MCU Firmware Package on a NUCLEO-WL55JC1 board, connecting to a ChirpStack LoRaWAN Network Server.While ChirpStack shows both the Join Request and Join Accept frames, the node fails to join and loops endlessly in a join retry state.Configuration & Keys    Updated AppEUI in se-identity.h to match ChirpStack settings.    Tested on STM32CubeWL Firmware Package V1.6.0 (and verified same issue on V1.5.0).Environment / Software Versions    Application: LoRaWAN_End_Node_LBM (V1.6.0)    Middleware (MW) LoRaWAN: V1.1.0    Middleware (MW) Radio: V1.4.0    L2 Spec: V1.0.4    RP Spec: V2-1.0.4Serial Monitor188s692: TX DONE188s739: RX1 LoRa at 4953 ms freq:868300000, DR 4, BW125, rx timeout 16 ms193s827: RX DONE193s827: RP: RX size 33193s828: Process join accept failed with code = 14193s828:Receive a bad packet on RX1 for stack_id = 0 continue with RX2193s828: RX2 LoRa at 895 ms freq:86952500

Despite my best efforts I cannot manage to connect my board to my PC and upload code (doing so from the Programmer). The environment consists of all three Cube applications (MX, IDE, Programmer) all at the latest version. Hardware wise, the board's jumpers are correctly placed for code upload, with the ST-LINK led turned on, as well as LED4 and LED9. There's also another blinking red led. I have tried all of the possible configurations (changing the frequency, mode, etc) and nothing seems to be working. The target voltage shows 3.3V, the programmer also can firmware upgrade the board, however I simply cannot connect to it. Please help!

I’m just starting a new project using the STM32H563. It has 16 channels of DMA, 8 in GPDMA1 and 8 in GPDMA2. I have at least 11 peripherals I’d like to use DMA for, UARTs, I2C and CAN. That means 22 channels of DMA if I want to use DMA for RX and TX. Does it make sense, or will it even work to use DMA for the RX side of a UART (for example) and IT for the TX side?My goal is to eliminate or at least minimize blocking in my program. I care more about DMA on the RX side since I often don’t know how many bytes will be in the message from the peripheral. I’ve used character match on the STM32H7A3 to deal with that in the past and the H563 is supposed to support character match also. TX is easier since I always know how many bytes I’m sending. I understand I’m still using CPU cycles to TX in IT mode but I don’t think that will cause any significant issues (I hope).

Dear ST Team,I have a STEVAL-ESC002V1 board and tried to generate the source code using MC Workbench, but I could not find the STEVAL-ESC002V1 board in the available options.I also checked the ST website and found firmware support for the IAR IDE:https://www.st.com/en/embedded-software/stsw-esc002v1.htmlHowever, I need support for STM32CubeIDE.Could you please confirm if STM32CubeIDE support is available for the STEVAL-ESC002V1 and guide me on how to generate or obtain the source code for this board?Thanks & Regards,Prashant Gautam

Hello everyone,I need to design a board featuring two STM32 microcontrollers that must operate in sync. To ensure clock synchronization, I plan to use a single external crystal.My proposed hardware approach is: Connect the standard external crystal (HSE) to MCU 1. Route the MCO (Microcontroller Clock Output) pin of MCU 1 to the OSC_IN pin of MCU 2. Configure MCU 2 to use HSE Bypass Mode, leaving its OSC_OUT pin floating. Place a series damping resistor on the trace between MCO and OSC_IN to prevent ringing. Could you please confirm if this topology is the correct and officially recommended approach for STM32 devices? Thanks in advance for your time and suggestions!

Is there currently a recommended alternative for the ST7540? Also, what is the PLC (powerline communication) chip that ST is currently promoting?

I'm currently developing with the STM32N6570-DK, using STM32N6 1.4.0 firmware, and using AI Studio and CubeMX to generate projects.However, I've encountered a very confusing problem. In the program generated by AI Studio, after calling MX_EXTMEM_MANAGER_Init() in the FSBL, it calls functions like BSP_XSPI_NOR_Init() and BSP_XSPI_RAM_Init(). This seems to be an additional Flash and SRAM driver written separately by the official documentation. /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_XSPI1_Init(); MX_XSPI2_Init(); MX_EXTMEM_MANAGER_Init(); /* USER CODE BEGIN 2 */__HAL_RCC_AXISRAM2_MEM_CLK_ENABLE(); __HAL_RCC_AXISRAM3_MEM_CLK_ENABLE(); __HAL_RCC_AXISRAM4_MEM_CLK_ENABLE(); __HAL_RCC_AXISRAM5_MEM_CLK_ENABLE(); __HAL_RCC_AXISRAM6_MEM_CLK_ENABLE();/** Workaround for an issue generated in STM32CubeN6 FW 1.4.0 **/ extern XSPI_NOR_Ctx_t XSPI_Nor_Ctx[XSPI_NOR_INSTANCES_NUMBER];

Hello everyone.I'm creating a TouchGFX project for a custom PCB with an STM32H7R7I8T6. After initial compilation issues, I unchecked the "Generate Under Root" option in the project manager and managed to compile the empty project and upload it to the MCU. Now I want to add a driver for the GT911 touch panel. I add one file, gt911.h, to the "Appli/Core/Inc" location, and it's visible, but the gt911.c file in the "Appli/Core/Src" location isn't visible to the project. This is my first time using this project organization and I can't figure it out.Please help.

Hello Team, On the Development Board, pin PN12 is used to detect whether an SD card is inserted or not; however, it is also required by xspm_p2_ncs, so I don’t think we can simultaneously use XSPIM1, XSPIM2, and PN12. Is there any other pin you would recommend for the purpose of detecting an SD card? Also, I am using the mechanical switch to detect the SD card. In the Datasheet, SDMMC1 is specified for the SD card However, in the AN5967 Document, SDMMC2 is preferred for the SD card. Which port, SDMMC1 OR SDMMC2, is preferred for a microSD card? Thanking you 

Hello Everyone,I am aiming to integrate a 64mb NOR Flash non-volatile memory to my stm32n6,However, the recommended models were MX66UW1G45GXDI00 and MX25UM51245GXDI00,They are out of stock on every major electronics market in the world,,are there any legit alternatives to these models , that are compaitable with stm32n6 and serves my need,If so please let me know.Thanking you

From my understanding all STM32N6 chips need a external flash chip and there's a static stage 0 boot loader.  So if this is true is there any limitation's on the brands of flash or speed/address bit size limitations? With the previous stage 0 bootloader for a different non ST product had a lot of limitation on the flash that could be used.* 16 bit flash address only* Only support a few brands of flash chips.  

That pretty much says it all.   Any attempt to tear down the connection (disable spi, disable dma, etc) before (long before) stop1 causes flash write after (many instructions after) the wfi to fail with PGSERR error.   Not tearing down the connection, flash write works, but standby doesn’t without additional work.   To be concrete dma3ChannelFreeI(spip->dmatx); if (spip->state == SPI_READY) { /* Just in case this has been called uncleanly.*/ (void) spi_lld_stop_abort(spip); spip->spi->CFG1 &= ~(SPI_CFG1_RXDMAEN | SPI_CFG1_TXDMAEN); spip->spi->CR1 &= ~SPI_CR1_SPE; /* Releasing DMA channels.*/ dma3ChannelFreeI(spip->dmarx); dma3ChannelFreeI(spip->dmatx); Those two lines -- spip->spi→… are what break flash write.  Clearly there is an undocumented interaction between peripherals and the clock and data transfer system, but the documentation for the part is shockingly incomplete on important details such as this.Leaving those lines out

Hi everyone,I’m working on a small STM32 project using a piezo buzzer and would like to generate a simple melody from different frequency tones.I can already generate individual tones by changing the timer frequency, but I’m not sure what the best approach is for playing a sequence of notes with different durations.For example, I would like to create a short melody such as:Note A → short duration Note B → short duration Note C → longer duration Pause → short duration RepeatWould it be better to use a timer with PWM and change the frequency for each note, or is there another recommended approach for generating melodies on STM32?I’m mainly looking for guidance on the structure of the code and how to handle the note frequency and duration cleanly.Thanks in advance for any suggestions!

Hello everyone,I'm trying to configure the SAI and GPDMA peripherals on an STM32 to acquire audio from an I2S microphone. My goal is to capture a 32-bit, 2-channel audio stream at a 16 kHz sample rate, with the STM32 acting as the clock master. I've followed the steps below, but I'm running into two main issues:While the HAL_SAI_RxCpltCallback and HAL_SAI_RxHalfCpltCallback functions are being called, the acquisition buffer remains unchanged (full of zeros).I'm seeing a 16 kHz signal on all three I2S lines (SCK, FS, and SD), which is incorrect. The clock (SCK) should be much higher.Here's a summary of the steps I've taken:PLL4 Configuration: I've configured PLL4 to generate a 1.024 MHz clock (16 kHz * 64 = 1.024 MHz). This clock feeds into the IC7 peripheral.GPDMA1 Configuration: I've enabled the clock and interrupts for GPDMA1 Channel 0 and added a linked-list initialization.SAI1 Block B1 Configuration: I've set up the SAI handle for I2S standard, 32-bit data, 16 kHz audio frequency,

Hi.I’m using CubeIDE, CubeMX and HAL to create an application for an STM32L451.I’ve setup USART1 to receive via DMA in circular mode and detect line idle, starting receptions with HAL_UARTEx_ReceiveToIdle_DMA(), and processing receptions in callback HAL_UARTEx_RxEventCallback().All seems to work fine except that the TC (transfer complete, or full buffer) interrupt never happens.HT (half transfer, or half of the buffer reached) and line idle do interrupt.I’m providing HAL_UARTEx_ReceiveToIdle_DMA() a buffer of size 128 bytes. I’m logging the value of the size argument to HAL_UARTEx_RxEventCallback(). When I manually send a message of 20 bytes repeatedly, but slowly enough to ensure line idle triggers, the callback is called with the following size values: 20, 40, 60, 64, 80, 100, 120, 120, 12, 32, 52, 64, 72, 92, 112, 112, 4, 24, (etc).You can see that line idle works, and also that HT is issued in the middle of a reception (size == 64), but TC isn’t, there’s no size equal to 128.What’s

I am trying to generate an interrupt when the HSP finishes a processing list so that I don’t need to poll it. However, I can’t seem to figure out how to do this.There are some things in the STM32U3 reference manual that make me confused:In section 19.4.12 HSP interrupt controller (HITC), there are four interrupt lines:• An interrupt line handling errors (hsp_err_it)• An interrupt line handling various hardware events (hsp_evt_it)• An interrupt line handling events generated by the SPE processing (hsp_fwevt_it)• A global interrupt is asserted when one of the previous interrupts is asserted (hsp_it)However, in Section 19.3 HSP Implementation, Table 143 shows that neither hsp_err_it, hsp_evt_it, nor hsp_fwevt_it are implemented in the U3 series. If this is the case, does that mean that hsp_it is just never asserted? Is it possible to notify the application when a processing list has finished without polling for a flag?Section 5.13.5 of UM3360: HSP processing functions says that the SET_FL