Product forums

Hello everyone,I’m working with an STM32F103C8T6 (Blue Pill) development board and facing an issue while trying to program/debug the MCU using ST-Link V2.Board used:https://robocraze.com/products/stm32f103c8t6-arm-development-boardIssue details:STM32CubeProgrammer / STM32CubeIDE does not consistently detect the targetSometimes shows “No target connected” or fails during connectionTried SWD mode with NRST connectedBOOT0 is set to 0 (Flash mode)Power supplied via USB (5V) and also tested with external 3.3VChecked SWDIO, SWCLK, GND continuityI’m not sure if this is related to board configuration, clock settings, or ST-Link connection parameters. I’d appreciate guidance on:Recommended ST-Link connection settings for STM32F103C8T6Any known issues with Blue Pill boards (pull-ups, reset circuit, USB power, etc.)Whether enabling connect under reset is mandatory for this MCUI’m still getting familiar with the forum and STM32 ecosystem, so apologies if I’ve missed something obvious. Looking forw

Hello Experts,I am working on the STM32MP257F-EV1 board (MB1936 Var1.0 Rev.C-01) and following the official OpenSTDroid provisioning guide. I have successfully used flash-device(STM32CubeProgrammer v2.22.0 ) to flash the full eMMC starter image via DFU mode (FlashLayout_emmc_cm33tdcid.tsv). After that, I switched the boot mode from DFU to eMMC (M33-TD) and pressed USER2 + RESET to enter fastboot mode, as described in the documentation. However, instead of entering fastboot, the board goes into an infinite reboot loop.Observed behavior: Serial console (minicom) shows the following repeated sequence: iac exceptions: [159:128]=0x000001IAC exception ID: 128Ooops...[INF] System reset[INF] Reset reason: System reset (SYSRST) (0x94)[INF] init:pmic@33 STPMIC:20 V1.1[INF] welcome to MCUboot: TF-Mv2.1.3-4-g0a94de886[INF] cpu: STM32MP257FAI Rev.?[INF] board: stm32mp257f eval1[INF] board ID: MB1936 Var1.0 Rev.C-01[INF] dts: stm32mp257f-ev1-cm33tdcid-ostl-emmc-bl2.dts[INF] boot device: sdmmc2[INF]

So our System works fine most of the time but sometimes the Reader does not detect the tag and we observe that rfalNfcState are just keep fluctuating between RFAL_NFC_STATE_POLL_TECHDETECT and  RFAL_NFC_STATE_LISTEN_TECHDETECT  same as when no tag present in the field of Reader and it is not able to satisfy this if condition.“if( rfalNfcIsDevActivated( rfalNfcGetState() ) ) // this if condition”We observed that even if we do controller reset it doesn’t fix the issue only when we power cycle the reader{st25r3911b} it start working again normally.I’m attaching the code with this i want your team to review it to let us know what exactly we are doing wrong which leading to this state where our rfal state machine not switching properly, With Restart_flag we are doing reinitialization i want you to review that whatever sequence we are following is correct or not  Main.c  {Rfid Reinitialization sequence}Please help us fix this issue and could you provide or help us that through software funct

We visually inspected the surface of the die of MPXM2053GS, which was covered by gel. We found some of them were not intact. there were holes and cracks on the gel. Although the electrical tests were passed but we are concerned about the long term reliability. Could someone advise if this is a normal phenomenon caused by the packaging process？ 

hi Good day,Can we seek your expertise regarding TDE1798DP top markings.is the 3rd row KWM012 pertaining to manufacturer traceability code ’KWM’?. and Date code for the last 3 digit ‘012’ which YWW, yr 2020, week 12.Thank you for your feedback.

Hello,I’m recently working on utilizing ROM I2C bootloader on STM32C0116F6U6, Device ID: 0x443, Rev Z.It seems that bootloader is reporting wrong version 0x11 instead of 0x12, while I got reply to GET command (0x00) from protocol v1.2 instead of v1.1 - there is clearly a byte 21 (0xA1) in reply (which is protocol v1.2 according to AN4221). Get as well as get version command are both returning 0x11.Because of this bug utilities like stm32flash are failing by not reading all bytes after issuing get command. stm32flash will try to resync by writing bad command (0xFF) and waiting for NACK but bootloader can keep clock line low for up to 6.2s if all bytes from previous transaction were not read.LA outputs, Get version:  Get command is returning 0xA1 byte which should not be there:  stm32flash too short get command read (it was expecting protocol v1.1), clock line will be hold low for 6.23s after writing resync byte (0xFF):  

Hello Team,I am currently reviewing the Secure Manager memory layout described in UM3254 (Secure Manager for STM32H573xx microcontrollers). The document provides predefined flash memory mappings for STM32H573 devices, including the Large Profile layouts shown in Figure 9 and Figure 10.       Our plan is to use STM32H5F4, which provides 4 MB of Flash, and I would like to understand the recommended Secure Manager memory mapping for this device. Could you please help with the following:Is there a predefined Secure Manager flash layout available for STM32H5F4 (4 MB Flash)?If available, could you share the corresponding memory map.Could you point me to the exact documentation, application note, user manual section, or reference project that describes Secure Manager support for STM32H5F4 devices?If no predefined layout exists, could you provide guidance on how the memory regions should be scaled from the STM32H573 large profile/External Flash profile example to support 4 MB Flash devices? Th

The above Logic analyzer and debugger  show a correct touch register If the simple GT911 library is used in bare bone STM32F429 but when the Code is integrated with the touchgfx and freertos of the sample STM32F429ZI Disco board then the I2C seems to get stuck and no I@C Communication happens as shown below. Touchgfx and Freertos integration  This is the initial power on this is zoomed view of packet 1zoomed view of packet 2After this the interrupt is generated periodically and I2C Communication halts indefinitelyBare Bone Codehave been attached and the Touchgfx freertos main.c/* USER CODE BEGIN Header *//** ****************************************************************************** * @file : main.c * @brief : Main program body ****************************************************************************** * @attention * * <h2><center>© Copyright (c) 2020 STMicroelectronics. * All rights reserved.</center></h2> * * This so

I’ve implemented a sort of dynamic menu where there are 6 positions and you can resize the menu item to become 2x1 or 1x2 (see screenshot for a better understanding)It is achieved by a custom widget class built on top of ShapeThe elements can be dragged and moved around and I’m using handleDragEvent to achive that. When dragging around there’s a method that re-position the element to avoid overlapping.For some reason, sometimes, not always, when the elements are moved automatically around, some strange artifacts. Is there a reason for that; where should I watch?(at the moment I’m only using the simulator)artifactshow it should render

Hi,I am using STM32H747I-DISCO with MB1166-A09 (NT35510) and Zephyr + LVGL with MIPI DSI Video Mode.I am facing a diagonal/slanted tearing line when the display is configured in landscape mode.Portrait mode: works correctly Landscape mode: diagonal/slanted tearing appears during screen updates Hardware: STM32H747I-DISCO + MB1166-A09 / NT35510 Software: Zephyr + LVGL PROI have found several related discussions about this issue, but I haven't found a clear solution for landscape DSI Video Mode.Is this a known limitation/issue with the display/DSI configuration? Is there a recommended solution for running this display reliably in landscape Video Mode?Any guidance from ST or anyone who has solved this would be greatly appreciated.

Hello everyone,I'm working on a custom PCB (professionally soldered, LGA packages) builtaround an STM32G474RET6, and I'm stuck on a communication issue with twoof my three SPI sensors. I'd really appreciate some insight from anyonewho has run into this before.My setup:- Host MCU: STM32G474RET6- Shared SPI3 bus: SCK=PC10, MISO=PC11, MOSI=PC12- TMAG5170 (SPI-only magnetometer), CS=PA11- ISM330DHCX (IMU), CS=PD2- MMC5983MA (magnetometer), CS=PA12The symptom I'm seeing:My TMAG5170 communicates perfectly over SPI, which tells me my SPI3 bus,my shared SCK/MISO/MOSI wiring, and my power rail are all healthy.However, my ISM330DHCX and MMC5983MA never respond in SPI mode — WHO_AM_I/ Product ID reads keep returning garbage (0xFF).Here's what I've already tried:1. I ruled out a software bug by switching from separate   HAL_SPI_Transmit / HAL_SPI_Receive calls to a single   HAL_SPI_TransmitReceive — no change.2. I checked for solder bridges under the LGA packages with a multimeter   (MISO to 3V3,

I’ve noticed that the order of the registers seems to matter. I would like an explanation as to why this is the case and if there is anything documented on this front.Specifically if you want to request the following registers: 25, 89, 1425, 2649, 7001, 73It appears that for some reason or another 73 must be last. If you request the above registers with 73 being anywhere but the last register it seems to cause the G4 to lock up and stop responding to any MCP or ASPEP commands. You also seem to be unable to recover without power cycling the core.Valid Order: 25, 89, 2649, 7001, 1425, 73->e9 00 00 b0->11 00 19 00 59 00 59 0a 59 1b 91 05 49 00<-4a 01 00 f0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2e 00 00 00Invalid Order: 25, 89, 73, 2649, 7001, 1425->e9 00 00 b0->11 00 19 00 59 00 49 00 59 0a 59 1b 91 05No response and the G4 hangs...Somehow it seems that the ST Motor Pilot is aware of this as it does place all the STATE register last in the packet.Motor Pilot v6.4.

Hello,we’are using CubeIDE (1.19 so far) and STM32H750B-DK boards for our several University courses. We have quite big repositories with working projects (mostly based on CubeMX generated .ioc and code) that can be edited, regenerated, debugged flawlessly in 1.19.Is it possible to import those projects in V2 and regenerate code and .ioc files in new v2 environment as it was possible before?I’ve heard that users have problems with migration of these types of projects - is this true? If there are problems, what to do in this situation? Will this ever be solved? Thanks,regards,Robert.   

Hello I would like to build a full bridge converter according to attached topology picture. The signals for controlling the switches should be like in the picture pwm_scheme. The frequency should be 500KHz. How to configure TIM1 or TIM8 on STM32H725ZGT6 to achieve this? To control the current i1 with lowering the duty cycle of the PWM which input is better to use: ETR or BKIN? Best regards Simon

Hello all ! Has anyone heard of the LX32F072CBT6 microprocessor? I found it when looking for the hardware used by a client.AI says me:“The LX32F072CBT6 is an alternative part number or specific designation that corresponds directly to the STM32F072CBT6 microcontroller manufactured by STMicroelectronics.” It seems to be a chinese copy of the STM32F072CBT6 but has someone some info about it? Kind regards,Michaël

Reporting two issues when using STM32CubeMX v6.16.1 to generate STM32N6 code. I created new secure only template project for STM32N6570-DK to demonstrate the issue (it's attached).Only changes to the new project are these:In MMT defined RAM2 area over AXI SRAM3-6. Also check the "Apply Application Regions Settings to Peripherals".Then activated RIF for FSBL:Now generate code.It generates FSBL\Core\Src\main.c function SystemIsolation_Config(void).There are two function calls that cause assert failure because they violate the HW capability: /* set up base region configuration for CPUAXI_RAM0*/ /* region2 is secure */ risaf_base_config.EndAddress = 0x1003ff; risaf_base_config.StartAddress = 0x00000400; HAL_RIF_RISAF_ConfigBaseRegion(RISAF2, RISAF_REGION_2, &risaf_base_config); /* set up Sub region configuration for CPUAXI_RAM0*/ risaf_sub_config.EndAddress = 0xfffff; risaf_sub_config.StartAddress = 0x00000400; HAL_RIF_RISAF_ConfigSubRegion(RISAF2, RISAF_REGION_2, RISAF_S

The AN3156 explains on page 18 the Read Unprotect Command:This command is selected when wValue = 0 and the first byte of the buffer sent by the host is 0x92. The buffer length is only one (the command) byte.The host sends a DFU_DNLOAD request with the above parameters to remove the read protection of the internal flash memory.   It is very useful that you implemented a command to remove the read protection.But this is useless if there is also a write protection active.The user has no way to remove a write protection over the DFU protocol.Why does this command not remove both: The read protection AND the write protection at the same time?Why does STM implement nothing that allows to remove a write protection ?

ProblemSTM32_Programmer_CLI.exe -c port=SWD sn=<sn> and -l stlink-only each take ~30 seconds (sometimes much more) under v2.23.0 when launched programmatically by another application (CreateProcess, stdio redirected to pipes, no console window) — the pattern any automated test/programming tool uses. CPU stays near-idle during the delay.Expected behaviorSame as v2.22.0 and same as running the CLI interactively on v2.23.0: under two seconds. Reinstalling v2.22.0, with no other change to our application, fixes it immediately.What doesn't explain itRuled out through direct testing: console presence, output redirection style, handle inheritance, antivirus, elevation, 32/64-bit calling process, working directory, concurrent vs. sequential calls, a full reboot, network reachability (disabled proxy auto-detect, firewall-blocked the exe, disabled WiFi entirely — none changed the timing), and the local Analytics\TrackedData.json cache (already empty).A Process Monitor trace of a slow call

Hello,I would like to confirm my interpretation of the marking M1013 on the old BUX10 transistors (TO-3 package) I’m using. I believe M stands for Malaysia and 1013 stands for week 10 of 2013 ; is this correct ?Thanks !

Does anybody know what the marking KCY547C means? Is it normal that there are several markings in one reel? 

Hi, I'm having some issues with the STM32WB06 when trying to achieve low power consumption. I hope someone can help me solve these problems. Issue 1: After initializing the Bluetooth protocol stack and enabling automatic connection establishment, it causes the device to fail to enter the low power state (BLE wake-up has been disabled). Is this a normal phenomenon? If not, what are the solutions? Issue 2: Before entering the low power mode, disabling automatic connection establishment allows the device to enter the low power mode normally. However, after waking up, attempting to re-enable automatic connection establishment fails (aci_gap_start_procedure(GAP_AUTO_CONNECTION_ESTABLISHMENT_PROC, LE_1M_PHY_BIT, 0, 0)). What is the solution for this problem?   I look forward to your replies. Thank you very much!

I downloaded and installed stm cube programmer, but every time I try to open it, I immediately get an error message saying that it quit unexpectedly. Currently running mac high sierra 10.13.6. How can I fix this problem?

EnvironmentMCU: STM32H573 (custom board) STM32CubeProgrammer & STM32 Trusted Package Creator: v2.23.0 (same version) X-CUBE-RSSe: installed (RSSe SFI binary v3.1.0, RSS v2.2.0) License: ST HSM (hsm=1, slot=1) Boot: custom OEM bootloader (OEM-iRoT), not STiRoT / not mcuboot Connection: HotplugWhat I'm doing I'm evaluating SFI without Secure Manager, installing my own firmware into internal secure flash. TrustZone is enabled (TZEN=0xB4), and my final option bytes (CSV) set:BOOT_UBE = 0xB4 (OEM-iRoT) SECBOOTADD = 0xC0000 (0x0C000000) SECWM1 = 0x00–0x7F, SECWM2 = 0x00–0x7F (all secure)Memory layout (secure alias 0x0C000000):File Address Size 1.bin 0x0C000000 22.2 KB 2.bin  0x0C008000 ~813 KB total 3.bin 0x0C0F7FA0 80 B 4.bin 0x0C0F8000 32 B 5.bin 0x0C1F8000 5.6 KB Behavior The SFI process starts correctly:License processed OK Image header processed OK Area 1 (type H) processed OK Fails at Area 2 with:Error: Execution of RSS CMD failed, returned value = 0xF

New question split from this post.One additinal request: When checking if bootloader pin configuration has an impact on the real application it would be helpful to know the default level for output pins, likedoes the UART_TX pin drive active high or low?does the boot loader drive the SPI MISO output pin HI, LO or Z?is the CAN_TX pin drven HI or LOW?Thank you!

Dear we working on safety critical application on railway. We are going to workout a FMECA analysis on our solution and I need further documentation on the STM32WLE5. At the begininning of the project we already signed an NDA with STM to get safety plan for another STM MCU. May we talk directly than I will send you a copy of the NDA ? Thanks a lot