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Hi ST Community,I am designing a custom board with STM32WLE5CCU6 (UFQFPN48 package) for a LoRa application in the 470–510 MHz band.I will use RFO_LP only, with +14 dBm output power and VDD_MCU = 3.3 V.Could you please provide the ZOPT (optimal impedance) for the PA output matching network at 475 MHz for this configuration?AN5457 Appendix A only covers 868/900/915/923 MHz, so I cannot find the data for 475 MHz. If there is any reference design or application note for this frequency, please point me to it.Thank you very much.

The name of the variable in the Live Expression in dark mode is wrong It should be white instead it’s blackVersion: 2.2.0Build: 29186_20260626_0934 (UTC)

I'm working on an STM32H743-based project driving a parallel LCD through LTDC, with the framebuffer sitting in external SDRAM via FMC. I keep running into intermittent display corruption that I suspect is cache-related, since the M7 core has D-Cache enabled by default.What's the recommended approach for setting up the MPU region for the framebuffer — mark the whole SDRAM region as non-cacheable, or is it better to keep caching enabled and handle cache maintenance manually (SCB_CleanDCache_by_Addr) around framebuffer writes? Curious what's worked best for people running LTDC + SDRAM at higher resolutions/refresh rates without a performance hit.

I would like to report a possible formatting issue in the STM32G491xC/xE datasheet, DS13122 Rev. 4, under the "Embedded SRAM" section. The datasheet currently states:"16 Kbytes mapped at address 0x20001 4000 (SRAM2)." I believe the intended address is:0x2001 4000or0x20014000 This appears to be consistent with the documented SRAM1 configuration:SRAM1: 80 Kbytes starting at 0x20000000 80 Kbytes = 0x14000 bytes 0x20000000 + 0x14000 = 0x20014000 Therefore, SRAM2 would begin at 0x20014000.Could you guys please confirm whether this is a formatting/documentation error and consider correcting it in a future revision of the datasheet?I have attached a screenshot showing the relevant section.

Hello ST Team,We have a custom STM32N657Z0H3Q board on which BOOT1 is routed to PN10 instead of the default PA6.To configure the Boot ROM to sample BOOT1 from PN10, we programmed OTP Word 19 (BOOTROM_CONFIG_10) as described in RM0486 Rev. 4, Section 5, Table 18:dev_boot_port [24:21] = 9 → Bank N (PN) → 9 << 21 = 0x01200000 dev_boot_pin [28:25] = 10 → Pin 10 → 10 << 25 = 0x14000000 OTP19 = 0x15200000Steps FollowedBefore programming, we read OTP through SWD. OTP19 was 0x00000000, with status 0x00000000, indicating that it was unprogrammed and not write-locked. SWD/ST-LINK access was working normally. We programmed OTP19 with 0x15200000 using STM32CubeProgrammer v2.23.0, without enabling the lock option. The tool reported: "OTP words programming done successfully"   After the next power cycle/reboot, the device no longer enters Development Boot. Instead, it boots from Flash, and our FSBL and application start running normally. SWD/debug access is no longer available.Same

Hello everybodyCould someone provide me with a schematic diagram for connecting an STM32U599NJ to an MT29F16G08ABCCBH1-AAT:C? Thanks a lot. Best regards

Hi all:I have an STM32F407 as main platform, as well as other types like STM32G0B1 and STM32F072, and I am trying to implement a robust SPI master for all of them.I want to reliably detect the end of frame in order to toggle the Chip Select line, but it is well known that the BSY flag is unusable for that purpose:STM32 gotchas68. SPI_SR.BSY is unusablehttp://www.efton.sk/STM32/gotcha/g68.htmlThe hardware NSS output, if available on the particular SPI, would fix the problem, but I have several SPI slaves, so that wouldn't work, would it? Or is there a way to check what the NSS output would be without sacrificing a pin?The recommendation is to use RXNE instead ob BSY, even if you are only transmitting and do not care about the received data.The idea is that, as soon as RXNE is set, the SPI frame has ended, as the last clock edge is what allows the master to finish reading the data from the slave, right?After RXNE is set, I can disable the Chip Select straight away. I could do that even b

Hi, I find the startup file generated by CubeMX2 for my STM32C551xx MCU doing something weird that I couldn’t understand. /**  * @brief  This function is the Reset Handler called on controller reset.  * @param  None  * @retval None  */__WEAK __NO_RETURN void Reset_Handler(void){  __set_PSP((uint32_t)(&__INITIAL_SP));  __set_MSPLIM((uint32_t)(&__STACK_LIMIT));  __set_PSPLIM((uint32_t)(&__STACK_LIMIT));  SystemInit();         /* CMSIS System Initialization */  __PROGRAM_START();    /* Enter PreMain (C library entry point) */}The code shown above reset the PSP pointer rather than MSP. I’m not sure if I do some misunderstanding about the stack pointer, as PM0264 indicated that MSP should be the one reset to the value retrieved by the reset handler. 

In the STM32CubeIDE project generated by STM32CubeMX for the default configuration on STM32F429I-DISC1 board, I can not find any reference to TIM1 except in the init function, i.e. ITM1 is initialized but not start. What TIM1 is used for?

Hi all,I'd appreciate some help with a BLE range and stability issue. SetupMCU: STM32WB5MMG module on a custom board Firmware package: STM32Cube FW_WB V1.23.0 BLE wireless stack: v1.16.0, full stack TX power: +1 dBm Connection interval: 10 ms min / 15 ms max. Peripheral latency is 0 and the supervision timeout is 6 s. ATT MTU: 180 Role: peripheral only. The central is a Windows 10/11 PC. PHY: Windows defaults to 2M PHYApplicationThe peripheral sends data to the Windows central over GATT notifications at about 5400 bytes/s (~30 packets/s). ProblemAt short range, the data notifications work correctly. As the distance grows to about 30–40 ft, data notifications start to struggle. At that distance, if the Windows central reads or writes any characteristic, the device goes into an unknown state. For a few seconds it continuously sends unexpected data: the values 0x0839 and 0x08FD repeat every 64 bytes.Often the device recovers within a few seconds and then completes the read/write. Sometime

Greetings,I have finished the schematics of my custom STM32MP13X based PCB, My aim with this PCB is to learn high speed digital circuit design & how the board bring up is done & various other things like loading RAM's timing information from an EEPROM to initialize RAM, etc.I would appreciate if my schematics could be reviewed & any potential issues could be pointed out before I start my PCB design (or worse, produce the PCBs) because I’m a student who’s funding this project from my part time job & I really don’t want to make an expensive mistake.The schematics are majorly based on STM32MP135-DK's reference schematics (MB1635) & I have attached the schematics (PDF) along with BoM file for package size information, etc.I would also like to mention that the schematics have been designed to keep costs low, This is also why most of the components will be sourced via LCSC & This is also why there’s no eMMC on-board. I also omitted the termination resistors on DDR bec

Dear Team,I am using the STM32F746IGT7 microcontroller in our design. As per the datasheet, the specified maximum junction temperature is 125°C.We would like to understand the implications of operating the IC at approximately 145°C, which is above the specified maximum junction temperature. Specifically:Will the IC sustain permanent damage if operated at 145°C? Could its functionality or performance be affected at this temperature? What kind of degradation or long-term effects can be expected? Is there any possibility of immediate failure, or could the IC continue to operate with reduced reliability?The requirement for operation at this elevated temperature was identified after the board had already been populated with this IC. Therefore, we would like to assess the practicality and reliability of operating the existing design at approximately 145°C.Kindly provide your recommendations and any relevant application notes or reliability data for operation beyond the specified junction tem

I am following this link for OEMiROT example with STM32C5 : https://wiki.st.com/stm32mcu/wiki/Security:How_to_start_with_OEMiRoT_on_STM32C5 But this example and steps are with IAR embedded workbench and Open-CMSIS.I need example and configuration with STM32Cube IDE to achieve OEMiROT with STM32C5 series. Let me know if any hint or example already provided

The text is contradictory on whether it’s 3 & 1,  or 4 & 2: Also, the table is unhelpful in not identifying which are the “General Purpose” timers, and which are the “Basic” timers.

Hello,We're integrating STM32CubeMX2 1.1.1 into a Linux-based development workflow (a VS Code DevContainer running Ubuntu 24.04) for STM32C5xx projects, and have run into two separate blocking issues: the installer has no silent/unattended mode, and once installed, the GUI crashes on startup and never shows a window. Details and everything we've already tried below, in case it saves time on your end.======================================================================ISSUE 1 — No silent/unattended install path on LinuxWe need to provision STM32CubeMX2 as part of an automated container image build (no interactive session available at build time). We could not find any way to do this:- Your own docs (STM32CubeMX2 1.0.0 install page) only document the interactive GUI wizard for Linux: chmod +x the installer, run it, click through Welcome -> Configuration -> License -> Installation.- We tried every CLI flag we could think of or find, including patterns used by OTHER ST installers

Hi all, i have very simple gpio pushbutton debounce code, but 50% of the time it still gets a double-bounce (led toggles twice), i.e. the debounceCount is double incremented as the interrupt service routine is mysteriously called twice. How can this be if the interrupt is immediately disabled?.  Is the switch bounce sometimes so quick that two presses are queued up before the interrupt is disabled?Within main() , if the button is pressed, there is a while(1) if(butIsPressed) {butIsPressed=FALSE; HAL_Delay(1000); and then HAL_NVIC_EnableIRQ(EXTI4_15_IRQn);}void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin){HAL_NVIC_DisableIRQ(EXTI4_15_IRQn);debounceCount++;HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_3); // Toggle The Output (LED) PinbutIsPressed = TRUE;} 

In the RM0090 manual, for the OTG_HS, the MPSIZ field definition is the same for all enpoints: Note: this is not the case for OTG_FS where endpoint 0 has a specific format for field MPSIZ. However, the code in file stm32f4xx_ll_usb.c sets this field to 0 in order to set the maximum packet size to 64 byte.See lines 1355 and 1356: /* Set the MPS of the IN EP0 to 64 bytes */ USBx_INEP(0U)->DIEPCTL &= ~USB_OTG_DIEPCTL_MPSIZ;It is OK with the OFG_FS definition on DIEPCTL0_MPSIZ but not with the OTG_HS definition.My question is: what should be done here:setting 0 in MPSIZ, like the code does or setting 64 in MPSIZ as specified in the RM0090 documentation?

I have a board which is in the STM32V8 family but i cant find anything about its datasheet or anything to work on it how can i work on a board which has no data sheet or any pin out things , even if i create a file using stmcubeide i cant find its ioc file for that particular project 

Hi, I have just installed STM32 Cube IDE 2.0.0 for Mac OS Apple Silicon, and then installed the GCC ARM for STM32 10.3-2021.10 toolchain through the toolchain manager. However when I import a project using this toolchain I get the nullgcc error.I also tried creating a new project and setting the toolchain to 10.3-2021.10 but still get the same error.When I look into the eclipse plugins folder searching for the toolchain binaries, I only see a .jar file but not the actual compiler folder with the binaries ls -l /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/ | grep gnu-tools-for-stm32Jul  9 11:22 com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10_1.2.100.202508251041.jarJun 26 11:52 com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.macosaarch64_1.0.0.202602081740un 26 11:52 com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1_1.0.100.202601091506.jarJun 26 11:52 com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32_2.

Hi everyone,I’m working with the STM32N6570-DK (STM32N6 Discovery Kit) and noticed that the example projects/scripts configure the external flash memory as 16 MB in the linker script.However, as far as I understand, the Discovery Kit supports 32 MB of external flash.I’m trying to understand why the linker scripts are configured for only 16 MB.For example, if the linker script contains something similar to:FLASH (rx) : ORIGIN = ..., LENGTH = 16MI have a few questions: Why is the linker script configured for 16 MB when the board supports 32 MB? Is the 16 MB value simply a default/example-project configuration, or is there a technical reason for it? Can the FLASH region safely be changed from 16 MB to 32 MB? Are there any restrictions related to the STM32N6 memory map, OCTOSPI/XSPI configuration, boot process, linker script, MPU/cache configuration, or startup code? If I want to use the complete 32 MB, are there any other project files or configurations that need to be modified in

Hello,I am working with an STM32H7S3L8 and I am currently testing the SAES and CRYP AES hardware accelerators using the STM32Cube HAL. I am using:MCU: STM32H7S3L8 Board: NUCLEO-H7S3L8 Firmware package: STM32Cube_FW_H7RS V1.3.0 API: `HAL_CRYP_Init()` and  `HAL_CRYP_Encrypt()` AES mode: AES-128-ECB SAES and CRYP are tested independently with the same NIST AES-128 test vector://CRYP TEST:int tests_cryp_aes128_ecb(void){ /* * NIST SP 800-38A * F.1 ECB-AES128.Encrypt */ __ALIGN_BEGIN static const uint32_t key[4] __ALIGN_END = {0x2B7E1516, 0x28AED2A6, 0xABF71588, 0x09CF4F3C}; __ALIGN_BEGIN static const uint32_t plaintext[4] __ALIGN_END = {0x6BC1BEE2, 0x2E409F96, 0xE93D7E11, 0x7393172A}; __ALIGN_BEGIN static const uint32_t expected_ciphertext[4] __ALIGN_END = {0x3AD77BB4, 0x0D7A3660, 0xA89ECAF3,

Hi all,I am using the VENC H.264 encoder (Middlewares/Third_Party/VideoEncoder from the STM32 model zoo object detection application) on the STM32N6570-DK Discovery Kit with the IMX335 camera. The encoder is fed RGB565 frames from DCMIPP (1280x720 buffer in external PSRAM), and the output goes to a PSRAM buffer.Problem:H264EncInit, H264EncSetPreProcessing, H264EncSetRateCtrl and H264EncStrmStart all return OK. The first H264EncStrmEncode call (intra frame) then returns -17 (H264ENC_FUSE_ERROR). In the driver, this is raised when the VENC status register has ASIC_STATUS_FUSE (0x200) set. The register description in encswhwregisters.h says: "IRQ stream format fuse status bit. Format disabled by fuse."After that, later frames often fail with -7 (INVALID_STATUS), then -14 (INSTANCE_ERROR), sometimes -3 (INVALID_ARGUMENT) or -16 (HW_RESET). At times the encoder recovers after frame 0 and produces a stream; at other times it never does. The behaviour is not consistent between runs, even at 6

I have been trying to use the motor profiler to characterize a motor that I do not have full specs for. I am getting “firmware is not a profiler fw….” which took me down the Application Configuration road in the MC workbench. There I discovered that the Profiler check box did not exist. That led me to the Current Sensing configuration section where the following is displayed:Current Mode is off and grayed-out Current Reading Selected hardware boards do not support this featureThe EVLSPIN32G0A2 of course, is a 3 shunt board. I am running 6.4.2 of the MC workbench. So what is happening here? I’m fairly new to this toolchain and thinking there’s a work-around someplace. For a little more context, I am trying to run a 6-step model with a Hall-sensored motor. I can get things to run in Pilot but there’s wonky stuff going on with the GUI. Thinking some of these observations may be related to the current sensing topo as well?

Title: ST67W611M1A6BTR – Are BOOT and UART required when using the factory firmware without modification?Hello,I am designing a custom board using an STM32G474 as the host MCU and an ST67W611M1A6BTR as the Wi-Fi/Bluetooth network coprocessor.I intend to use the standard X-CUBE-ST67W61 software and communicate with the module through the SPI/AT interface. I do not intend to develop or debug custom firmware running inside the QCC743 SoC.After reviewing the ST67W611M1 datasheet, the B2413 reference schematic, AN6316, and the ST hardware setup wiki, I would like to clarify the required programming and debug connections.In the B2413 schematic, module pins 1 to 4 are shown as: Pin 1: JTMS Pin 2: JTCK Pin 3: BOOT_WW6 / JTDO Pin 4: JTDI However, in the ST67W611M1 datasheet, pins 1, 2, and 4 are marked as RESERVED and are required to be left unconnected for the A6B/A6U variants.My questions are as follows: Does every production ST67W611M1A6BTR module contain a usable mission firmware imag

Stm32cubeAI studio output      -------------------------------------------------------------------                       STM32CubeProgrammer v2.23.0                        -------------------------------------------------------------------ST-LINK SN  : 0042001A3234510337333934ST-LINK FW  : V3J17M10Board       : NUCLEO-N657X0-QVoltage     : 3.30VSWD freq    : 8000 KHzConnect mode: Under ResetReset mode  : Hardware resetDevice ID   : 0x486Revision ID : Rev ZDevice name : STM32N6xxDevice type : MCUDevice CPU  : Cortex-M55BL Version  : --Opening and parsing file: NUCLEO-N657X0-Q_Appli.elfMemory Programming ...  File          : NUCLEO-N657X0-Q_Appli.elf  Size          : 2.60 MB   Address       : 0x34000000Erasing memory corresponding to segment 0:Erasing memory corresponding to segment 1:Erasing external memory sectors [16 57]Error: failed to erase memoryError: failed to erase memoryRun failed: Error: STM32CubeProgrammer exited with code 1