Register 6Fh, D[1] SPI_HSoff_highLow ohmic path switch off disable bit for HS pre-driver stage A and B0 / R/W (default) (‘1’ = low ohmic path enabled)When D[1] =0,  Low ohmic path between HS driver GHy_x and SHy_x is connected or disconnected?When H-...

Per example code of L9369, to set SPI_set_PWM, one read-write operation for 6Ah is used and  to set SPI_PWM_A, another read-write operation for 6Ah is used. My question: Can two separate read-write operations be merged into only one？ Thanks!

EN_EL pin (#47) is originally EN function and to set it as RST function， need to set D[4] of reg8Ah. My question: When to set D[4] to 1 to enable RST function?  should it do after setting watchdog ? Thanks!    RST Remapping on EN_EL the function of I...

L9369 registers, its feature is CR: Clear on Read Read such register,  all 16 bits of this register will be changed to the Default status, right? 

The L9369 is dual channel solution for two rear wheels brakes actuators, but we need only 1 channel for one motor.  Is there special design to combine two channels to drive one motor? If there is single channel EPB driver chip similar to L9369, L9369...