Invalidate need to be done before the DMA to address line evictionWhat are you trying to achieve doing so ? Eviction due to dirty lines (slide 31 of http://events17.linuxfoundation.org/sites/events/files/slides/slides_17.pdf) ? But you fixed the rul...
Multiple cases:1) RX buffer not cacheableRationale: no real CPU processing on itAlignment: probably the non-cacheable region is already aligned to a multiple of cache line, so no real constraint (except maybe DMA constraint)CPU can consume the buffer...
Hello,SPC56xL70 has 64 Message Buffers.These should cover your static and dynamic slots allocation. Depending on yourFlexray topology, you may need to reconfigure some MBs on the fly depending onwhere you are in the communication cycle, among the cyc...
This speed is far from being confirmed and this trick is probably not viable in production (automotive grade, noise immunity, etc ...). Schottky diodes with fast transient response are required. The pull-up value has probably to be decreased if the n...
