I am new to Arm but old to assembly coding (inc Toshiba 32 bit CISC - now extinct).. Just completed RCC startup code for a STM32F344 chip by looking at the 1124 pages (!) of the RM0364 manual and the CUBE LL start up code (!!!). The CUBE code has wai...
....so says STM32F334x4/x6/x8 Errata sheet STM32F334x4/x6/x8 Rev Z device limitationsDoc is dated 2021. No answers seen on web.Has this been fixed yet?If not, will it be fixed? And if so, when?Ta lotsRex
Sama STa that makes better sense!Does the same error apply here?:..........Extracts from RM3604 - the STM32F334 reference manual21.5.41HRTIM Interrupt Status Register (HRTIM_ISR)Bit 16 DLLRDY: DLL Ready Interrupt FlagThis bit is set by hardware when ...
I have after countless faultless restarts with no waiting for HSI/Sysclk/PLL clock ready, it seems practically that these waits are redundant. But as they exist in St's LL code I will leave them in just to be sure!,
Ta for those ideas Danish. All is grist to this mill!.Yes -don't need any crystal - less bits, less failures, The 8 Mhz HSI can do everything we need - receive 8 bytes of data at 250Khz baudrate, and apply those 4 words to 4 channels of ~2OkHz, 16 bi...
JanI read yr FLASH_ACR post - v interesting and thanks for the reference,I had noted that the CUBE LL code implemented that flash wait check too. And yr explanation was better than ST;s ref manual (RM0364 for the STM32F334 chip) .ST: I do wish the w...
