I have flashed the application onto the HSM core of SR6G7, and I can see that the HSM core is not running up without a trigger from the Host core. After some analysis, I found that the HSM core requires a power mode change from DRUN mode to RUN mode ...

To enable the HSM notification to application core, I understood that we need to enable HSM2HOST IE register. I would like to know which bit position of 32 bit, we need to enable to make interrupt activate ? There is no such informations in the safet...

I would like to know that, what are the minimum DCF configuration required to activate the HSM core in Stellar SR6G7? Is there any Lauterbach cmm script available to flash the UTEST DCF configuration?