About WCarey

WCarey · 2024-05-29

I am using SPI CRC feature of STM32H563ZI.My ST Master must transmit an 8 bit CRC with a polynomial 0x07.It receives a 16 bit CRC from the slave (a different hardware). The ST Master must now compute a 16 bit CRC with polynomial 0x11021 and verify th...

WCarey · 2024-04-24

What is the procedure to flush Tx and Rx FIFOs when using SPI DMA in STM32H563ZI?

WCarey · 2024-04-23

Hi,My NUCLEO-H563ZI application uses SPI with DMA. The SPI transactions are not working at clock/2 clock/4 and clock/8 rates, clock being 250 Mhz. Is there any clock frequency restriction when SPI is used with DMA?

WCarey · 2024-04-22

I enabled the SPI CRC calculation (with a length SPI_CRC_LENGTH_16BIT) in my STM32H563ZI master application. During Tx, I want the 2 bytes of the calculated CRC to be swapped and transmitted i.e. a CRC of 0xABCD must be sent out as 0xCD 0xAB and not...

WCarey · 2024-04-17

Hi,I have my master and slave applications running on NUCLEO-H563ZI Boards both of which normally receive/transmit 10 bytes of data in each SPI transfer. I use SPI in DMA mode.However, in one test case, master starts a SPI transaction for only 4 byt...

WCarey · 2024-05-29

Or is it possible to check the CRC on Rx (on the response received) only and disable transmission of CRC during Tx in the SPI CRC configuration?Because for my master application, verifying received CRC from the slave is more important than transmitti...

WCarey · 2024-04-29

My master uses the SS pin (active low) to start and stop the SPI transfers. So, I configure the SS pin as a rising edge interrupt GPIO on the slave and if there's any data left on TX/Rx DMA channels, I abort the SPI.void HAL_GPIO_EXTI_Rising_Callbac...

WCarey · 2024-04-23

This is my SPI Configuration.Upto a clk freq of SPI_BAUDRATEPRESCALER_16 (250/16 = 15.625 Mhz), my SPI transactions work i.e the 10 bytes I send from Master are coming up on the MOSI line. And my slave also behaves correctly.However, for frequencies ...

WCarey · 2024-04-23

Can this be done using CRC peripheral itself rather than using SPI's CRC feature?

WCarey · 2024-04-23

My slave application running on a different target receives the CRC in that order ( lower byte first ).

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How to use different CRCpolynomials for SPI Tx and SPI Rx?

How to flush Tx/Rx FIFOs in SPI DMA

SPI DMA is not workng at higher SPI baud rates

How to swap the SPI CRC value and then transmit it?

How to abort SPI Slave when Master requests for less bytes?

Re: How to use different CRCpolynomials for SPI Tx and SPI Rx?

Re: How to flush Tx/Rx FIFOs in SPI DMA

Re: SPI DMA is not workng at higher SPI baud rates

Re: How to swap the SPI CRC value and then transmit it?

Re: How to swap the SPI CRC value and then transmit it?