Posted on November 09, 2015 at 18:23Hi, I have recently got my SD card running on an STM32F7 with the SDMMC (with DMA) and came across one issue. The DMA request mapping in the Reference Manual (Table 25. DMA2 request mapping) indicates two streams ...
Posted on August 31, 2014 at 16:42
Hi folks,
I debugged an issue with my own USB Full-Speed host stack where transmission stops at random.
Chip: STM32F407@168MHz, USB_FS core, internal PHY
In my test scenario I am using using...
Posted on March 25, 2015 at 15:53Hi Bryan, at least I am not the only one with this problem. I really think this is a silicon bug and should be put into the errata. I tried several ways of detecting and correcting the ignored DFIFO write, but none o...
Posted on September 25, 2014 at 15:31Is there somebody else who could help me with that problem? clive? (= The issue still persists. Is there a way to escalate this problem to some ST engineers to check back?
Posted on September 02, 2014 at 10:52Hi Tsuneo, and thanks for your reply. I think the PHY clock is 48MHz for the full speed core, isn't it? - edit begin - I just verified it, I set FSLSPCS in the OTG_FS_HCFG to 01, thereby selecting a PHY speed of...
