Posted on July 11, 2018 at 17:03I'm curious if anyone else has seen this issue.We are using 20 ppm LSE at 32768hz as the clock source for our RTC. Over an 8 hour period, we are a few seconds off vs. the expected max of .6 S for the 20 ppm.Our syste...
Posted on May 23, 2014 at 20:15
whenever i perform the dma transfer, I always get a transfer error on the write to TIM1->BDTR. If I write to a different peripheral register, such as TIM3->ARR, it succeeds. Any thoughts?
TIM_TimeBaseIni...
Posted on July 11, 2018 at 22:44Output to MCO looked good which corresponds well with seeing 70000000 system clocks in 1 second per RTCNo watchdog, no sleepNot my code. FW engineer is on vacation.
