About YObre.1

YObre.1 · 2022-03-23

What am I trying to do?I'm trying to send CAN messages on a 500 kbit/s bus with a STMF769I-DISCO. At the same time I'm trying to have a screen running LVGL (v8.0.0) on which is dependent on having the HCLK higher than 200 MHz. Lower clock speeds caus...

YObre.1 · 2022-03-23

Thanks! I've already done all of the above. Not really in that order though.I've solved the problem now. The clock I was using for the system clock was the internal high speed clock, HSI. The problem seems to be that the internal high speed clock bec...

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[SOLVED] I have problems sending CAN (Controller area network) messages with my STM32F7 DISCO board when HCLK is higher than 140 MHz (the break point migh be above 144 MHz). What could be wrong?

Re: [SOLVED] I have problems sending CAN (Controller area network) messages with my STM32F7 DISCO board when HCLK is higher than 140 MHz (the break point migh be above 144 MHz). What could be wrong?