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Dimalex · 2022-03-22

The FMPI2C master of STM32F446 module extends the clock of the acknowledge bit with random delays from a few microseconds to a few milliseconds. That happens quite frequently w/o causing an issue, but sometimes the SCL line remains forced low by the...

Dimalex · 2022-03-22

Indeed DMA shall be used to avoid such "issues"So, the hanging situation might not be related with the stretched ACK, but with the signal hygiene? In this case only thing we could do is to implement retries and workarounds.

Dimalex · 2022-03-22

Thanks for the reply. I agree with everything what you said, but this case is about the ack bit which is set once in the begging of the read transfer and only changed at the last byte. We'll try to debug it, once the project is migrated to CubeIDE.

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The FMPI2C master of STM32F446 module extends (stretches) the acknowledge (ACK) bit with random delays

Re: The FMPI2C master of STM32F446 module extends (stretches) the acknowledge (ACK) bit with random delays

Re: The FMPI2C master of STM32F446 module extends (stretches) the acknowledge (ACK) bit with random delays