About MSzaj.1

MSzaj.1 · 2020-07-03

Documentation say ADC have max 4Msps, but it refer olways to 60MHz to adc (60MHz * 15 cycle = 4Msps) but manual say ADC max frequency is 170MHz, then 170MHz * 15cycle = 11Msps.This clock is different from Fadc (aka adc kernel clock)?https://www.st.co...

MSzaj.1 · 2020-02-23

I compiled example from st cube. I found in clock configuration this parameters:RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV6; RCC_OscInitStruct.PLL.PLLN = 85;This give to sysclk 177Mhz and it exceeds max frequency... when I set parameters to:RCC_OscIni...

MSzaj.1 · 2020-09-15

Hi all,I'm back about this problem. There is possibility to clock ADC with 170MHz clock and run over 4Msps (I run it with 8Msps). Of course documentation say I shouldn't do it, but in examples you (I mean ST) provide ADC clk is set to 170MHz!!! and i...

MSzaj.1 · 2020-07-04

Thanks for answer. In https://www.st.com/resource/en/datasheet/stm32g474cb.pdf we have ADC characteristics and there is lmitation. Then there is problem with samples... examples from cube firmware packet have set ADC clock to 170MHz and it work, howe...

MSzaj.1 · 2020-07-03

if PLL 'P" and SYSCLK is only for source interface clock, then where is source clock for ADC conversion?!

MSzaj.1 · 2020-07-03

I read RM0440 21.4.3 and I know AHB bus could have different clock that ADC clock, but still 7.2.11 say about ADC clk not AHB bus."Alternatively, the ADC clock can be derived from the AHB clock of the ADC bus interface", then it could have same clock...

MSzaj.1 · 2020-07-03

then what is source of adc kernel clock? and what prescaler register it or have some default prescaler (and adc kernel clock is depend on sysclock?)?

User statistics

User Activity

ADC only 4Msps?

STM32G474 Nucleo. Overclock example for HRTIM problem

Re: ADC only 4Msps?

Re: ADC only 4Msps?

Re: ADC only 4Msps?

Re: ADC only 4Msps?

Re: ADC only 4Msps?