About Dominik Lorych

Dominik Lorych · 2022-02-08

Hi, I have found a few bugs in the Mailbox communication code of the STM32WB (which is responsible for letting CPU1 and CPU2 communicate). But other Dual-Core MCUs potentially could have the same bugs.The bugs are not security-critical, but they caus...

Dominik Lorych · 2022-01-18

Hi, I am writing this both as a guide to other people struggling with their STM32 AES accelerator, and as a suggestion to STM how to improve their HAL so it is easier to use. My testing and debugging was done on a STM32WB, but i think other accelerat...

Dominik Lorych · 2022-01-04

Hi,I am currently trying out the AES Accelerator of the STM32WB55, using the HAL. It is working fine on its own, but I am unable to get matching results to MbedTLS. So Ciphertexts and Tags generated by the Accelerator are not matching those generated...

Dominik Lorych · 2021-12-20

Hi,I am trying to get the FUS to work with a minimal bootloader, without Interrupts. But even with Interrupts I did not manage to get it working yet. Is there a simple approach to implementing it without needing any of the BT code? I only want to be ...

Dominik Lorych · 2021-01-29

Hi,I have some code running on a Nucleo-STM32L476 which keeps running into the Reset Handler. But this does not cause a boot loop, instead the code just gets stuck there (the PC register points to the first line of assembler of the reset handler).I m...

Dominik Lorych · 2022-07-04

Hi Manuel,there is an AES-CTR example in the AES_Modes example project for the WB55 that uses 128 bits IV. There they use the key and IV from the NIST example, but NOT the plaintext and ciphertext from the example. (Usually these examples implement t...

Dominik Lorych · 2022-01-18

For anyone stumbling over this, here is the solution:https://community.st.com/s/question/0D53W00001JWgFMSA1/a-guide-to-the-hal-of-the-aes-accelerator-or-how-to-fix-it

Dominik Lorych · 2022-01-06

I now have figured out how to initialize the Mailbox and CPU2 manually. For anyone else wondering, this is the rudimentary way://initialize Mailbox uint8_t* devInfoTable = (uint8_t*) 0x20030024; uint32_t* systemTable = (uint32_t*) (0x20030024 + 52); ...

Dominik Lorych · 2022-01-04

Bump to the top after the holidays 

Dominik Lorych · 2021-02-02

I set the SCB->VTOR accordingly before jumping to the next layer. But this problem is unrelated to the jumping because this problem only exists in the first layer, before the code jumps.But I am fine with using the workaround, I am just curious why t...

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Bugs in Mailbox communication code of STM32WB

A guide to the HAL of the AES accelerator, or how to fix it

AES_GCM Acceleration: Mismatch between Accelerator and MbedTLS & Header size forced to 1 by CubeMX

STM32WB55: Interaction with FUS

STM32L476: Code runs into Reset Handler if Interrupts get activated although no Interrupts are triggered

Re: A guide to the HAL of the AES accelerator, or how to fix it

Re: AES_GCM Acceleration: Mismatch between Accelerator and MbedTLS & Header size forced to 1 by CubeMX

Re: STM32WB55: Interaction with FUS

Re: STM32WB55: Interaction with FUS

Re: STM32L476: Code runs into Reset Handler if Interrupts get activated although no Interrupts are triggered