About michal_ca

michal_ca · 2020-01-23

Hi guys,I was wondering if there are people interested in artificial inteligence computed on embedded devices? Recently i have found a smart chip for accelerating neural networks produced by a Korean company called NM500 http://general-vision.com/doc...

michal_ca · 2019-10-07

Hi all,I working on parallel synchronous transmission. I am using LPTIM2 as clock (PWM) and GPIOE as data bus. It is working with BDMA but here is 50ns offset between Clock and data no matter what frequency I setup. Please see pictures below 84kHz a...

michal_ca · 2019-09-26

Hi all,I have problem to get work stm32h743 as parallel synchronous transmission with DMA and 16bits GPIO and timer as clok. I need something like in Application note AN4666 but for H7xx.I'm using GPIO port E what is on AHB4 and it si D3 domain and...

michal_ca · 2020-01-28

Hi Azdine,Yes it does. STM32 and NM500 - direct connection. May I ask you what project are you working on ? If you want developing kit I working on it. It will be available end of this week.schematic for NeuroShield is here https://github.com/nepes-a...

michal_ca · 2019-10-08

Yes a timer-triggered BDMA from memory SRAM4 to GPIOSure I understand that all these operation take some time, however the example AN4666 with STM32F4 and STM32L4 work without resynchronization.

michal_ca · 2019-10-03

Hi all,I make it work with BDMA and LPTIM2 and SRAM4, but here is 50ns offset between Clock (LPTIM2 PWM) and 16bit gpio. As I mentioned before I need parallel synchronous transmission so I would like to eliminate 50ns offset between clock and data.I...

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STM32F + NM500 neuromorphic chip - hardware neural chip

BDMA 50ns offset between Clock (LPTIM2 PWM) and 16bit GPIOE.

STM32H743 Parallel synchronous transmission with DMA and GPIO

Re: STM32F + NM500 neuromorphic chip - hardware neural chip

Re: BDMA 50ns offset between Clock (LPTIM2 PWM) and 16bit GPIOE.

Re: STM32H743 Parallel synchronous transmission with DMA and GPIO